aboutsummaryrefslogtreecommitdiff
path: root/drivers/clk
diff options
context:
space:
mode:
authorHai Pham2020-05-19 17:42:05 +0700
committerMarek Vasut2021-05-21 15:00:17 +0200
commit1b004e28749b6cbab4c4340ac4aeba5ed498b026 (patch)
tree4ec4437591416ea3276fdd5ef601d50388b9f40a /drivers/clk
parentefece632e7063c0ee901b6ffb4bb6294b45665f2 (diff)
clk: renesas: Fix Realtime Module Stop Control Register offsets
This patch fixes Realtime Module Stop Control Register (RMSTPCR) offsets based on R-Car Gen3, H2/M2/M2N/E2/E2X hardware user's manual. The r8a73a4 only has RMSTPCR0 - RMSTPCR5 so this calculation change doesn't affect it. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/renesas/renesas-cpg-mssr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 7c1222f6c8c..bed2a16448a 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -55,7 +55,7 @@ static const u16 smstpcr[] = {
/* Realtime Module Stop Control Register offsets */
-#define RMSTPCR(i) (smstpcr[i] - 0x20)
+#define RMSTPCR(i) ((i) < 8 ? smstpcr[i] - 0x20 : smstpcr[i] - 0x10)
/* Modem Module Stop Control Register offsets (r8a73a4) */
#define MMSTPCR(i) (smstpcr[i] + 0x20)