diff options
| author | Dylan Hung | 2023-02-21 21:01:10 +0800 |
|---|---|---|
| committer | Tom Rini | 2023-03-06 17:03:56 -0500 |
| commit | 95f79553849cfb936f8c1e8d453b5a8b73db462c (patch) | |
| tree | 949aab1c9db1d4865ac322704161b6602b43c03c /drivers/clk | |
| parent | 45443f6089e1e194bdd8f2aa351c72e32eb1d815 (diff) | |
clk: ast2600: Keep PLL power on
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/aspeed/clk_ast2600.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 0df1dc3718d..e5ada5b6d49 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -538,7 +538,7 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu *scu, } p_cfg->reg.b.bypass = 0; - p_cfg->reg.b.off = 1; + p_cfg->reg.b.off = 0; p_cfg->reg.b.reset = 1; reg = readl(addr); @@ -549,7 +549,6 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu *scu, /* write extend parameter */ writel(p_cfg->ext_reg, addr_ext); udelay(100); - p_cfg->reg.b.off = 0; p_cfg->reg.b.reset = 0; reg &= ~GENMASK(25, 0); reg |= p_cfg->reg.w; |