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authorBreno Lima2021-03-25 17:30:16 +0800
committerStefano Babic2021-04-08 09:18:29 +0200
commita30798113c6f5919708cc849798a583d6e5aad53 (patch)
tree8bbe7fa91f86232739a85b055645bbcd88189fde /drivers/crypto
parent2c0dcc5de6416510e8365f5e37de46c7a98d9a7e (diff)
crypto: fsl: blob: Flush dcache range for destination address
The blob command is not working on i.MX7D, i.MX8MQ and i.MX8MM devices. Due to different cache management it's necessary to flush dcache range for destination address so data can be available in memory. Add necessary operations in blob_encap() and blob_decap() functions. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/fsl/fsl_blob.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c
index d6bd861251e..e8202cc5697 100644
--- a/drivers/crypto/fsl/fsl_blob.c
+++ b/drivers/crypto/fsl/fsl_blob.c
@@ -65,6 +65,9 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len)
flush_dcache_range((unsigned long)desc,
(unsigned long)desc + size);
+ flush_dcache_range((unsigned long)dst,
+ (unsigned long)dst + size);
+
ret = run_descriptor_jr(desc);
if (ret) {
@@ -130,6 +133,9 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len)
flush_dcache_range((unsigned long)desc,
(unsigned long)desc + size);
+ flush_dcache_range((unsigned long)dst,
+ (unsigned long)dst + size);
+
ret = run_descriptor_jr(desc);
if (ret) {