aboutsummaryrefslogtreecommitdiff
path: root/drivers/dma
diff options
context:
space:
mode:
authorMugunthan V N2016-02-15 15:31:37 +0530
committerJagan Teki2016-02-23 16:14:45 +0530
commita0594cefb7682dc0c32084d088b3ac0a85ed7395 (patch)
treefa70110c909901dc0c8258168e982d5b03c5beb0 /drivers/dma
parent18c61e95714f4a18f1a206369fc187639d9845e1 (diff)
dm: implement a DMA uclass
Implement a DMA uclass so that the devices like ethernet, spi, mmc etc can offload the data transfers from/to the device and memory. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/Kconfig15
-rw-r--r--drivers/dma/Makefile2
-rw-r--r--drivers/dma/dma-uclass.c72
3 files changed, 89 insertions, 0 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index e69de29bb2d..58cb6e95313 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -0,0 +1,15 @@
+menu "DMA Support"
+
+config DMA
+ bool "Enable Driver Model for DMA drivers"
+ depends on DM
+ help
+ Enable driver model for DMA. DMA engines can do
+ asynchronous data transfers without involving the host
+ CPU. Currently, this framework can be used to offload
+ memory copies to and from devices like qspi, ethernet
+ etc Drivers provide methods to access the DMA devices
+ buses that is used to transfer data to and from memory.
+ The uclass interface is defined in include/dma.h.
+
+endmenu # menu "DMA Support"
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index f95fe70a999..39b78b2a3d6 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -5,6 +5,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_DMA) += dma-uclass.o
+
obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
obj-$(CONFIG_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_FSL_DMA) += fsl_dma.o
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
new file mode 100644
index 00000000000..ea21fd9c6fe
--- /dev/null
+++ b/drivers/dma/dma-uclass.c
@@ -0,0 +1,72 @@
+/*
+ * Direct Memory Access U-Class driver
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * Author: Mugunthan V N <mugunthanvnm@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dma.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dma_get_device(u32 transfer_type, struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ for (ret = uclass_first_device(UCLASS_DMA, &dev); dev && !ret;
+ ret = uclass_next_device(&dev)) {
+ struct dma_dev_priv *uc_priv;
+
+ uc_priv = dev_get_uclass_priv(dev);
+ if (uc_priv->supported & transfer_type)
+ break;
+ }
+
+ if (!dev) {
+ error("No DMA device found that supports %x type\n",
+ transfer_type);
+ return -EPROTONOSUPPORT;
+ }
+
+ *devp = dev;
+
+ return ret;
+}
+
+int dma_memcpy(void *dst, void *src, size_t len)
+{
+ struct udevice *dev;
+ const struct dma_ops *ops;
+ int ret;
+
+ ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
+ if (ret < 0)
+ return ret;
+
+ ops = device_get_ops(dev);
+ if (!ops->transfer)
+ return -ENOSYS;
+
+ /* Invalidate the area, so no writeback into the RAM races with DMA */
+ invalidate_dcache_range((unsigned long)dst, (unsigned long)dst +
+ roundup(len, ARCH_DMA_MINALIGN));
+
+ return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len);
+}
+
+UCLASS_DRIVER(dma) = {
+ .id = UCLASS_DMA,
+ .name = "dma",
+ .flags = DM_UC_FLAG_SEQ_ALIAS,
+ .per_device_auto_alloc_size = sizeof(struct dma_dev_priv),
+};