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authorSimon Glass2015-08-22 15:58:59 -0600
committerSimon Glass2015-08-26 07:54:15 -0700
commitdf1c9eb505a194e2957356d9e0d730dbe03ed45d (patch)
tree47230478402ef9cbed69ff307c9a19e8f105dda8 /drivers/gpio
parente7cc0b6f006e547e86b111187d192ea8211c7576 (diff)
x86: gpio: Tidy up gpio_ich6_get_base() and callers
This function can return an error. Correct the detection of this error so that it works even with large 32-bit addresses. The return value is set up for returning an I/O address but the function is also used to return a memory-mapped address. Adjust the return code to make this work. Also add a bit more debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/intel_ich6_gpio.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index fd1f28703fb..67bf0a2dd31 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -75,7 +75,7 @@ static int gpio_ich6_get_base(unsigned long base)
/* Is the device present? */
tmpword = x86_pci_read_config16(pci_dev, PCI_VENDOR_ID);
if (tmpword != PCI_VENDOR_ID_INTEL) {
- debug("%s: wrong VendorID\n", __func__);
+ debug("%s: wrong VendorID %x\n", __func__, tmpword);
return -ENODEV;
}
@@ -144,7 +144,7 @@ static int gpio_ich6_get_base(unsigned long base)
* at the offset that we just read. Bit 0 indicates that it's
* an I/O address, not a memory address, so mask that off.
*/
- return tmplong & 0xfffc;
+ return tmplong & 1 ? tmplong & ~3 : tmplong & ~15;
}
static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value)
@@ -324,7 +324,7 @@ int gpio_ich6_pinctrl_init(void)
debug("%s: io-base offset not present\n", __func__);
} else {
iobase = gpio_ich6_get_base(iobase_offset);
- if (iobase < 0) {
+ if (IS_ERR_VALUE(iobase)) {
debug("%s: invalid IOBASE address (%08x)\n", __func__,
iobase);
return -EINVAL;