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authorNeha Malcom Francis2023-04-05 16:24:35 +0530
committerTom Rini2023-05-04 13:03:54 -0400
commit8048a34376b1fa5856d646e188311533c51729fc (patch)
tree7e5d6145ff6b76113d02152461a7d829f63ef95f /drivers/misc
parent7f30eec1779b8f641b9563a1dab6a6865916ec01 (diff)
k3: pmic: Clear ESM masks
ESM MCU masks must be set to 0h so that PMIC can handle errors that require attention for example SYS_SAFETY_ERRn. The required bits must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK. If PMIC expected to handle errors, make sure EVM is configured to connect SOC_SAFETY_ERRz (Main) to the PMIC. Note that even though the User Guide for TPS65941 for J721E mentions that these bits are reset to 0h; it is not reflected once board boots to kernel, possibly due to NVM configurations. Eithercase, it is best to account for this from R5 SPL side as well. Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/esm_pmic.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c
index a195dc5eb1d..b971f32f6a1 100644
--- a/drivers/misc/esm_pmic.c
+++ b/drivers/misc/esm_pmic.c
@@ -26,6 +26,9 @@
#define ESM_MCU_EN BIT(6)
#define ESM_MCU_ENDRV BIT(5)
+#define ESM_MCU_MASK_REG 0x59
+#define ESM_MCU_MASK 0x7
+
/**
* pmic_esm_probe: configures and enables PMIC ESM functionality
*
@@ -48,6 +51,12 @@ static int pmic_esm_probe(struct udevice *dev)
return ret;
}
+ ret = pmic_reg_write(dev->parent, ESM_MCU_MASK_REG, ESM_MCU_MASK);
+ if (ret) {
+ dev_err(dev, "clearing ESM masks failed: %d\n", ret);
+ return ret;
+ }
+
ret = pmic_reg_write(dev->parent, ESM_MCU_START_REG, ESM_MCU_START);
if (ret) {
dev_err(dev, "starting ESM failed: %d\n", ret);