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authorStephen Warren2016-06-17 09:44:00 -0600
committerSimon Glass2016-06-19 17:05:55 -0600
commit135aa95002646c46e89de93fa36adad1b010548f (patch)
treeb601e08f7d91c7e2cda127d59f8f81128d0cb1ac /drivers/mmc/uniphier-sd.c
parent4581b717b1bf0fb04e7d9fcaf3d4c23d357154ac (diff)
clk: convert API to match reset/mailbox style
The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc/uniphier-sd.c')
-rw-r--r--drivers/mmc/uniphier-sd.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 4978cca76d8..152e9873970 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -651,8 +651,7 @@ int uniphier_sd_probe(struct udevice *dev)
struct uniphier_sd_priv *priv = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
fdt_addr_t base;
- struct udevice *clk_dev;
- int clk_id;
+ struct clk clk;
int ret;
priv->dev = dev;
@@ -665,20 +664,22 @@ int uniphier_sd_probe(struct udevice *dev)
if (!priv->regbase)
return -ENOMEM;
- clk_id = clk_get_by_index(dev, 0, &clk_dev);
- if (clk_id < 0) {
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0) {
dev_err(dev, "failed to get host clock\n");
- return clk_id;
+ return ret;
}
/* set to max rate */
- priv->mclk = clk_set_periph_rate(clk_dev, clk_id, ULONG_MAX);
+ priv->mclk = clk_set_rate(&clk, ULONG_MAX);
if (IS_ERR_VALUE(priv->mclk)) {
dev_err(dev, "failed to set rate for host clock\n");
+ clk_free(&clk);
return priv->mclk;
}
- ret = clk_enable(clk_dev, clk_id);
+ ret = clk_enable(&clk);
+ clk_free(&clk);
if (ret) {
dev_err(dev, "failed to enable host clock\n");
return ret;