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authorMarek Vasut2017-07-21 23:24:33 +0200
committerJaehoon Chung2017-09-22 23:23:27 +0900
commit1c99f68e932b0ebf97aad038400eaf70ce5c6c8e (patch)
tree08c50df12825b24d7668cf5e5c6b3ead4f4a3f22 /drivers/mmc/uniphier-sd.c
parent3d7b1d1bc4474d2a85dc8d1a8001258dce56806a (diff)
mmc: uniphier-sd: Add support for 64bit controller
The Renesas RCar Gen3 contains the same controller, originally Matsushita, yet the register addresses are shifted by 1 to the left. The whole controller is also 64bit, including the data FIFOs and RSP registers. This patch adds support for handling the register IO by shifting the register offset by 1 in the IO accessor functions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc/uniphier-sd.c')
-rw-r--r--drivers/mmc/uniphier-sd.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index f6682231a23..013089299d8 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -132,17 +132,24 @@ struct uniphier_sd_priv {
#define UNIPHIER_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */
#define UNIPHIER_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */
#define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */
+#define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */
};
static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg)
{
- return readl(priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ return readl(priv->regbase + (reg << 1));
+ else
+ return readl(priv->regbase + reg);
}
static void uniphier_sd_writel(struct uniphier_sd_priv *priv,
const u32 val, const u32 reg)
{
- writel(val, priv->regbase + reg);
+ if (priv->caps & UNIPHIER_SD_CAP_64BIT)
+ writel(val, priv->regbase + (reg << 1));
+ else
+ writel(val, priv->regbase + reg);
}
static dma_addr_t __dma_map_single(void *ptr, size_t size,