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authorhuang lin2015-11-17 14:20:24 +0800
committerSimon Glass2015-12-01 08:07:22 -0700
commit2863724831a37b7ef84ba7490c4d41e678191b03 (patch)
tree71afc979a9d991d27340742304a566cead3458da /drivers/mmc
parentace2198b7c54b3078f537255eb215ec5819cd0c8 (diff)
rockchip: mmc: get the fifo mode and fifo depth property from dts
rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver. Signed-off-by: Lin Huang <hl@rock-chips.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index dfe20f90f5d..aeaec6c8658 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -64,6 +64,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
struct dwmci_host *host = &priv->host;
u32 minmax[2];
int ret;
+ int fifo_depth;
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
if (IS_ERR(priv->grf))
@@ -72,10 +73,22 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
if (ret)
return ret;
- ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
- "clock-freq-min-max", minmax, 2);
- if (!ret)
- ret = add_dwmci(host, minmax[1], minmax[0]);
+ if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+ "clock-freq-min-max", minmax, 2))
+ return -EINVAL;
+
+ fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "fifo-depth", 0);
+ if (fifo_depth < 0)
+ return -EINVAL;
+
+ host->fifoth_val = MSIZE(0x2) |
+ RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
+
+ if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
+ host->fifo_mode = true;
+
+ ret = add_dwmci(host, minmax[1], minmax[0]);
if (ret)
return ret;