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authorEugeniy Paltsev2018-03-22 13:50:43 +0300
committerJagan Teki2018-03-22 23:01:35 +0530
commitc6b4f031d96a4e1d59761b294829b058b098f3df (patch)
treeb4b0c7dc260387c4b5f7dcf4fea03109c61b071e /drivers/net/e1000_spi.c
parent2511930193a420eb8bb6cfa9c60912626f68ae67 (diff)
DW SPI: fix tx data loss on FIFO flush
In current implementation if some data still exists in Tx FIFO it can be silently flushed, i.e. dropped on disabling of the controller, which happens when writing 0 to DW_SPI_SSIENR (it happens in the beginning of new transfer) So add wait for current transmit operation to complete to be sure that current transmit operation is finished before new one. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'drivers/net/e1000_spi.c')
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