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authorYork Sun2017-03-06 09:02:29 -0800
committerYork Sun2017-03-14 08:44:03 -0700
commit437858b62010f3d67694b117952b62d4be86e976 (patch)
treeca97df387eb2cb68175b61e7b5972eff38086447 /drivers/net/fsl-mc
parent36cc0de0b919c0e185739142742e0a76a7c5c30a (diff)
driver: net: fsl-mc: Update calculation of MC RAM
Since the reserved RAM is tracked by gd->arch.resv_ram, calculation of MC memory blocks can be simplified. The MC RAM is guaranteed to be aligned by the reservation process. Signed-off-by: York Sun <york.sun@nxp.com> CC: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net/fsl-mc')
-rw-r--r--drivers/net/fsl-mc/mc.c59
1 files changed, 8 insertions, 51 deletions
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 231a6d5ffa0..9f69d75a89d 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -154,48 +154,6 @@ int parse_mc_firmware_fit_image(u64 mc_fw_addr,
}
#endif
-/*
- * Calculates the values to be used to specify the address range
- * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
- * It returns the highest 512MB-aligned address within the given
- * address range, in '*aligned_base_addr', and the number of 256 MiB
- * blocks in it, in 'num_256mb_blocks'.
- */
-static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
- size_t mc_ram_size,
- u64 *aligned_base_addr,
- u8 *num_256mb_blocks)
-{
- u64 addr;
- u16 num_blocks;
-
- if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
- printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
- mc_ram_size);
- return -EINVAL;
- }
-
- num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
- if (num_blocks < 1 || num_blocks > 0xff) {
- printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
- mc_ram_size);
- return -EINVAL;
- }
-
- addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
- MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
-
- if (addr < mc_private_ram_start_addr) {
- printf("fsl-mc: ERROR: bad start address %#llx\n",
- mc_private_ram_start_addr);
- return -EFAULT;
- }
-
- *aligned_base_addr = addr;
- *num_256mb_blocks = num_blocks;
- return 0;
-}
-
static int mc_fixup_dpc_mac_addr(void *blob, int noff, int dpmac_id,
struct eth_device *eth_dev)
{
@@ -550,17 +508,16 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
size_t raw_image_size = 0;
#endif
struct mc_version mc_ver_info;
- u64 mc_ram_aligned_base_addr;
u8 mc_ram_num_256mb_blocks;
size_t mc_ram_size = mc_get_dram_block_size();
-
- error = calculate_mc_private_ram_params(mc_ram_addr,
- mc_ram_size,
- &mc_ram_aligned_base_addr,
- &mc_ram_num_256mb_blocks);
- if (error != 0)
+ mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
+ if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) {
+ error = -EINVAL;
+ printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
+ mc_ram_size);
goto out;
+ }
/*
* Management Complex cores should be held at reset out of POR.
@@ -602,11 +559,11 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
/*
* Tell MC what is the address range of the DRAM block assigned to it:
*/
- reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
+ reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks - 1);
out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
out_le32(&mc_ccsr_regs->reg_mcfbahr,
- (u32)(mc_ram_aligned_base_addr >> 32));
+ (u32)(mc_ram_addr >> 32));
out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
/*