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authorTom Rini2022-04-05 11:27:39 -0400
committerTom Rini2022-04-05 11:27:39 -0400
commit037ef53cf01c522073a0a930c84c3ca858f032e1 (patch)
treeaa6ce3d6777690251a57e7bb85c2865005046b30 /drivers/net/phy
parent4de720e98d552dfda9278516bf788c4a73b3e56f (diff)
parenta7379ba6505d70d887951be9ebb3f47e3792c708 (diff)
Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2 xilinx: - Allow booting bigger kernels till 100MB zynqmp: - DT updates (reset IDs) - Remove unneeded low level uart initialization from psu_init* - Enable PWM features - Add support for 1EG device serial_zynq: - Change fifo behavior in DEBUG mode zynq_sdhci: - Fix BASECLK setting calculation clk_zynqmp: - Add support for showing video clock gpio: - Update slg driver to handle DT flags net: - Update ethernet_id code to support also DM_ETH_PHY - Add support for DM_ETH_PHY in gem driver - Enable dynamic mode for SGMII config in gem driver pwm: - Add driver for cadence PWM versal: - Add support for reserved memory firmware: - Handle PD enabling for SPL - Add support for IOUSLCR SGMII configurations include: - Sync phy.h with Linux - Update xilinx power domain dt binding headers
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/ethernet_id.c49
-rw-r--r--drivers/net/phy/phy.c2
2 files changed, 29 insertions, 22 deletions
diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c
index 5617ac3ad62..1a78a751ede 100644
--- a/drivers/net/phy/ethernet_id.c
+++ b/drivers/net/phy/ethernet_id.c
@@ -12,7 +12,7 @@
#include <asm/gpio.h>
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
- phy_interface_t interface)
+ int phyaddr, phy_interface_t interface)
{
struct phy_device *phydev;
struct ofnode_phandle_args phandle_args;
@@ -33,35 +33,42 @@ struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
ret = ofnode_read_eth_phy_id(node, &vendor, &device);
if (ret) {
- dev_err(dev, "Failed to read eth PHY id, err: %d\n", ret);
+ debug("Failed to read eth PHY id, err: %d\n", ret);
return NULL;
}
- ret = gpio_request_by_name_nodev(node, "reset-gpios", 0, &gpio,
- GPIOD_ACTIVE_LOW);
- if (!ret) {
- assert = ofnode_read_u32_default(node, "reset-assert-us", 0);
- deassert = ofnode_read_u32_default(node,
- "reset-deassert-us", 0);
- ret = dm_gpio_set_value(&gpio, 1);
- if (ret) {
- dev_err(dev, "Failed assert gpio, err: %d\n", ret);
- return NULL;
- }
+ if (!IS_ENABLED(CONFIG_DM_ETH_PHY)) {
+ ret = gpio_request_by_name_nodev(node, "reset-gpios", 0, &gpio,
+ GPIOD_ACTIVE_LOW);
+ if (!ret) {
+ assert = ofnode_read_u32_default(node,
+ "reset-assert-us", 0);
+ deassert = ofnode_read_u32_default(node,
+ "reset-deassert-us",
+ 0);
+ ret = dm_gpio_set_value(&gpio, 1);
+ if (ret) {
+ dev_err(dev,
+ "Failed assert gpio, err: %d\n", ret);
+ return NULL;
+ }
- udelay(assert);
+ udelay(assert);
- ret = dm_gpio_set_value(&gpio, 0);
- if (ret) {
- dev_err(dev, "Failed deassert gpio, err: %d\n", ret);
- return NULL;
- }
+ ret = dm_gpio_set_value(&gpio, 0);
+ if (ret) {
+ dev_err(dev,
+ "Failed deassert gpio, err: %d\n",
+ ret);
+ return NULL;
+ }
- udelay(deassert);
+ udelay(deassert);
+ }
}
id = vendor << 16 | device;
- phydev = phy_device_create(bus, 0, id, false, interface);
+ phydev = phy_device_create(bus, phyaddr, id, false, interface);
if (phydev)
phydev->node = node;
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 92fff5b72c0..d4731860f73 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1049,7 +1049,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
#ifdef CONFIG_PHY_ETHERNET_ID
if (!phydev)
- phydev = phy_connect_phy_id(bus, dev, interface);
+ phydev = phy_connect_phy_id(bus, dev, addr, interface);
#endif
#ifdef CONFIG_PHY_XILINX_GMII2RGMII