diff options
| author | Tom Rini | 2022-11-16 13:10:33 -0500 |
|---|---|---|
| committer | Tom Rini | 2022-12-05 16:06:07 -0500 |
| commit | ecc8d425fd50d894dd0a06796c17030ef4a7942f (patch) | |
| tree | 6fade563d93ccb2dc3c774bdcc3d2f5cf5b6403c /drivers/pci/pcie_fsl.c | |
| parent | 789bb9537a4427798e3e28ff0c6be2c27454315f (diff) | |
global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci/pcie_fsl.c')
| -rw-r--r-- | drivers/pci/pcie_fsl.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index a8f8c31bef8..4600652f2b1 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -343,8 +343,8 @@ static int fsl_pcie_setup_outbound_wins(struct fsl_pcie *pcie) static int fsl_pcie_setup_inbound_wins(struct fsl_pcie *pcie) { - phys_addr_t phys_start = CONFIG_SYS_PCI_MEMORY_PHYS; - pci_addr_t bus_start = CONFIG_SYS_PCI_MEMORY_BUS; + phys_addr_t phys_start = CFG_SYS_PCI_MEMORY_PHYS; + pci_addr_t bus_start = CFG_SYS_PCI_MEMORY_BUS; u64 sz = min((u64)gd->ram_size, (1ull << 32)); pci_size_t pci_sz; int idx; @@ -367,8 +367,8 @@ static int fsl_pcie_setup_inbound_wins(struct fsl_pcie *pcie) sz = 2ull << __ilog2_u64(sz); fsl_pcie_setup_inbound_win(pcie, idx--, true, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI_MEMORY_BUS, sz); + CFG_SYS_PCI_MEMORY_PHYS, + CFG_SYS_PCI_MEMORY_BUS, sz); #if defined(CONFIG_PHYS_64BIT) && defined(CONFIG_SYS_PCI_64BIT) /* * On 64-bit capable systems, set up a mapping for all of DRAM @@ -380,12 +380,12 @@ static int fsl_pcie_setup_inbound_wins(struct fsl_pcie *pcie) pci_sz = 1ull << (__ilog2_u64(gd->ram_size) + 1); dev_dbg(pcie->bus, "R64 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)CONFIG_SYS_PCI64_MEMORY_BUS, - (u64)CONFIG_SYS_PCI_MEMORY_PHYS, (u64)pci_sz); + (u64)CFG_SYS_PCI64_MEMORY_BUS, + (u64)CFG_SYS_PCI_MEMORY_PHYS, (u64)pci_sz); fsl_pcie_setup_inbound_win(pcie, idx--, true, - CONFIG_SYS_PCI_MEMORY_PHYS, - CONFIG_SYS_PCI64_MEMORY_BUS, pci_sz); + CFG_SYS_PCI_MEMORY_PHYS, + CFG_SYS_PCI64_MEMORY_BUS, pci_sz); #endif return 0; |