diff options
| author | Pali Rohár | 2021-10-22 16:22:13 +0200 |
|---|---|---|
| committer | Stefan Roese | 2021-11-03 06:45:26 +0100 |
| commit | 42ab3b30046007f000adfd67427a72593f5b3d81 (patch) | |
| tree | f1aab483ad6ab09d3566458ff9d9cbd1d1c3244f /drivers/pci | |
| parent | 79b4eb21b486e30b29c5ba3038ea6ba0e1968458 (diff) | |
pci: pci_mvebu: Do not automatically enable bus mastering on PCI Bridge
Now that PCI Bridge is working, U-Boot's CONFIG_PCI_PNP code automatically
enables memory access and bus mastering when it is needed. So do not
prematurely enable memory access and bus mastering.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci_mvebu.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 4cb237d2c45..4c7fd8d5a99 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -451,14 +451,6 @@ static int mvebu_pcie_probe(struct udevice *dev) /* Setup windows and configure host bridge */ mvebu_pcie_setup_wins(pcie); - /* Master + slave enable. */ - reg = readl(pcie->base + PCIE_CMD_OFF); - reg |= PCI_COMMAND_MEMORY; - reg |= PCI_COMMAND_IO; - reg |= PCI_COMMAND_MASTER; - reg |= BIT(10); /* disable interrupts */ - writel(reg, pcie->base + PCIE_CMD_OFF); - /* PCI memory space */ pci_set_region(hose->regions + 0, pcie->mem.start, pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); |