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authorMayuresh Chitale2023-11-16 22:21:02 +0530
committerMichal Simek2023-12-13 08:58:06 +0100
commit891b4814800bd3ad5d16c5d45e0cd05709f64721 (patch)
tree59152577c1c6cbfbd2142165db8f1257984c7378 /drivers/pci
parent3c6b1fdade236e5fa97b058529a91da476627461 (diff)
pci: xilinx: Fix "reg" not found error
Fix the driver to use the dev_read_addr_size API to fetch the reg property from the DT. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Link: https://lore.kernel.org/r/20231116165103.140968-2-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie_xilinx.c29
1 files changed, 12 insertions, 17 deletions
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 53fd121e905..fdc9b08c10b 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -8,11 +8,10 @@
#include <common.h>
#include <dm.h>
#include <pci.h>
-#include <asm/global_data.h>
#include <linux/bitops.h>
#include <linux/printk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/err.h>
/**
* struct xilinx_pcie - Xilinx PCIe controller state
@@ -140,20 +139,16 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,
static int pcie_xilinx_of_to_plat(struct udevice *dev)
{
struct xilinx_pcie *pcie = dev_get_priv(dev);
- struct fdt_resource reg_res;
- DECLARE_GLOBAL_DATA_PTR;
- int err;
-
- err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
- 0, &reg_res);
- if (err < 0) {
- pr_err("\"reg\" resource not found\n");
- return err;
- }
-
- pcie->cfg_base = map_physmem(reg_res.start,
- fdt_resource_size(&reg_res),
- MAP_NOCACHE);
+ fdt_addr_t addr;
+ fdt_size_t size;
+
+ addr = dev_read_addr_size(dev, &size);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ pcie->cfg_base = devm_ioremap(dev, addr, size);
+ if (IS_ERR(pcie->cfg_base))
+ return PTR_ERR(pcie->cfg_base);
return 0;
}