diff options
| author | Pali Rohár | 2021-09-26 00:54:43 +0200 |
|---|---|---|
| committer | Stefan Roese | 2021-10-08 08:37:55 +0200 |
| commit | 95e101e86ae9d4dbc29ab82bcf1cfa8820a7ba4a (patch) | |
| tree | e7482e86aebfc9acbd83ff001cf8f40241778673 /drivers/pci | |
| parent | cb056005dc674fb5fce89d2b7bdc37594b180b68 (diff) | |
arm: a37xx: pci: Do not automatically enable bus mastering on PCI Bridge
Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP
code automatically enables memory access and bus mastering when needed.
We do not need to enable it when setting the HW up.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci-aardvark.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 082fdc3b74d..2481cbea526 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -910,12 +910,6 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) if (pcie_advk_wait_for_link(pcie)) return -ENXIO; - reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); - reg |= PCIE_CORE_CMD_MEM_ACCESS_EN | - PCIE_CORE_CMD_IO_ACCESS_EN | - PCIE_CORE_CMD_MEM_IO_REQ_EN; - advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG); - return 0; } |