diff options
| author | Marek Vasut | 2021-01-16 00:28:18 +0100 |
|---|---|---|
| committer | Marek Vasut | 2021-02-20 22:38:28 +0100 |
| commit | b9616d8f903c8f4c7eac78adc7a8ff41c3099be3 (patch) | |
| tree | 5b1224eeb9d8c7f03e55c31b47248671d0607ac0 /drivers/pci | |
| parent | ea966d24ef3a9f7f32712a518a07374f9ae43905 (diff) | |
pci: renesas: Add root bus handling on Gen3
Add code to access the PCIe root bus space and configure it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci-rcar-gen3.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 0d5b01f9f81..cd116a536e5 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -151,6 +151,16 @@ static int rcar_pcie_config_access(const struct udevice *udev, struct rcar_gen3_pcie_priv *priv = dev_get_plat(udev); u32 reg = where & ~3; + /* Root bus */ + if (PCI_DEV(bdf) == 0) { + if (access_type == RCAR_PCI_ACCESS_READ) + *data = readl(priv->regs + PCICONF(where / 4)); + else + writel(*data, priv->regs + PCICONF(where / 4)); + + return 0; + } + /* Clear errors */ clrbits_le32(priv->regs + PCIEERRFR, 0); @@ -187,11 +197,14 @@ static int rcar_gen3_pcie_addr_valid(pci_dev_t d, uint where) { u32 slot; + if (PCI_BUS(d)) + return -EINVAL; + if (PCI_FUNC(d)) return -EINVAL; slot = PCI_DEV(d); - if (slot != 1) + if (slot > 1) return -EINVAL; return 0; |