diff options
author | Marek Vasut | 2023-09-17 16:08:41 +0200 |
---|---|---|
committer | Marek Vasut | 2023-10-01 00:08:28 +0200 |
commit | 05329b9a00da35695e1144d83a6a3b3f2cfe221e (patch) | |
tree | 0f340dd3f05342ef8d34b7a4a88c7d7917fa30d4 /drivers/pinctrl | |
parent | 259aac6a2763b2b0072c37ff46b770d071053877 (diff) |
pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/renesas/pfc-r8a7796.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index 3cc4a3b366a..163d1805dfb 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -25,12 +25,12 @@ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ - PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33), \ PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \ - PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33), \ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) @@ -5568,7 +5568,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { /* RESERVED 16-1 */ MOD_SEL2_0 )) }, - { }, + { /* sentinel */ } }; static const struct pinmux_drive_reg pinmux_drive_regs[] = { @@ -5816,7 +5816,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30 */ { RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31 */ } }, - { }, + { /* sentinel */ } }; enum ioctrl_regs { @@ -5827,7 +5827,7 @@ enum ioctrl_regs { static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { [POCCTRL] = { 0xe6060380, }, [TDSELCTRL] = { 0xe60603c0, }, - { /* sentinel */ }, + { /* sentinel */ } }; static int r8a7796_pin_to_pocctrl(unsigned int pin, u32 *pocctrl) @@ -6084,7 +6084,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [30] = SH_PFC_PIN_NONE, [31] = SH_PFC_PIN_NONE, } }, - { /* sentinel */ }, + { /* sentinel */ } }; static const struct sh_pfc_soc_operations r8a7796_pfc_ops = { |