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authorJagan Teki2017-06-06 05:31:47 +0000
committerStefano Babic2017-07-12 09:42:33 +0200
commit57d3e98f570a8d4cd0dac9c738d4574e00872d90 (patch)
treebf4711d21348af0080ec7dc0e739e1ac7b5bb99b /drivers/serial/serial_mxc.c
parent62af03ee970e3b86b7bbda5d00a94071cfec2cbf (diff)
serial: mxc: Move cr1 and cr2 write to mxc_serial_setbrg
Control reg write should be part of setbrg for better buadrate generation, so move cr1 and cr2 write to mxc_serial_setbrg Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial/serial_mxc.c')
-rw-r--r--drivers/serial/serial_mxc.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index fbf8e51591a..cf6f0447f27 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -162,6 +162,9 @@ static void mxc_serial_setbrg(void)
writel(0xf, &mxc_base->bir);
writel(clk / (2 * gd->baudrate), &mxc_base->bmr);
+ writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
+ &mxc_base->cr2);
+ writel(UCR1_UARTEN, &mxc_base->cr1);
}
static int mxc_serial_getc(void)
@@ -216,11 +219,6 @@ static int mxc_serial_init(void)
serial_setbrg();
- writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
- &mxc_base->cr2);
-
- writel(UCR1_UARTEN, &mxc_base->cr1);
-
return 0;
}