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authorAlbert ARIBAUD2015-05-05 10:09:06 +0200
committerAlbert ARIBAUD2015-05-05 10:09:06 +0200
commitb939689c7b87773c44275a578ffc8674a867e39d (patch)
tree785d71eb0bbc707385e4456a14b21706223d99a3 /drivers/serial
parent97840b5d1fe0960134c3553a9d9d1c1cd1be784d (diff)
parentace97d26176a3ebc9ec07738450de93eea35975c (diff)
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/Kconfig10
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/ns16550.c36
-rw-r--r--drivers/serial/serial-uclass.c6
-rw-r--r--drivers/serial/serial.c2
-rw-r--r--drivers/serial/serial_pl01x.c13
-rw-r--r--drivers/serial/serial_stm32.c117
-rw-r--r--drivers/serial/serial_uniphier.c1
-rw-r--r--drivers/serial/serial_zynq.c8
9 files changed, 173 insertions, 21 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 1686a1f951e..54e6f26d38d 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -66,6 +66,16 @@ config DEBUG_UART_CLOCK
A default should be provided by your board, but if not you will need
to use the correct value here.
+config DEBUG_UART_SHIFT
+ int "UART register shift"
+ depends on DEBUG_UART
+ default 0 if DEBUG_UART
+ help
+ Some UARTs (notably ns16550) support different register layouts
+ where the registers are spaced either as bytes, words or some other
+ value. Use this value to specify the shift to use, where 0=byte
+ registers, 2=32-bit word registers, etc.
+
config UNIPHIER_SERIAL
bool "UniPhier on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index b385852eee4..d183eedbcb3 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
obj-$(CONFIG_X86_SERIAL) += serial_x86.o
+obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 03beab5a14b..3d376d75808 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
+#include <mapmem.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
@@ -56,7 +57,7 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_DM_SERIAL
-static inline void serial_out_shift(unsigned char *addr, int shift, int value)
+static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
outb(value, (ulong)addr);
@@ -71,7 +72,7 @@ static inline void serial_out_shift(unsigned char *addr, int shift, int value)
#endif
}
-static inline int serial_in_shift(unsigned char *addr, int shift)
+static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
return inb((ulong)addr);
@@ -113,9 +114,11 @@ static int ns16550_readb(NS16550_t port, int offset)
/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr) \
- ns16550_writeb(com_port, addr - (unsigned char *)com_port, value)
+ ns16550_writeb(com_port, \
+ (unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
- ns16550_readb(com_port, addr - (unsigned char *)com_port)
+ ns16550_readb(com_port, \
+ (unsigned char *)addr - (unsigned char *)com_port)
#endif
static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
@@ -172,7 +175,6 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
#endif
- NS16550_setbrg(com_port, 0);
serial_out(UART_MCRVAL, &com_port->mcr);
serial_out(UART_FCRVAL, &com_port->fcr);
if (baud_divisor != -1)
@@ -253,15 +255,19 @@ void debug_uart_init(void)
*/
baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
CONFIG_BAUDRATE);
-
- serial_out_shift(&com_port->ier, 0, CONFIG_SYS_NS16550_IER);
- serial_out_shift(&com_port->mcr, 0, UART_MCRVAL);
- serial_out_shift(&com_port->fcr, 0, UART_FCRVAL);
-
- serial_out_shift(&com_port->lcr, 0, UART_LCR_BKSE | UART_LCRVAL);
- serial_out_shift(&com_port->dll, 0, baud_divisor & 0xff);
- serial_out_shift(&com_port->dlm, 0, (baud_divisor >> 8) & 0xff);
- serial_out_shift(&com_port->lcr, 0, UART_LCRVAL);
+ serial_out_shift(&com_port->ier, CONFIG_DEBUG_UART_SHIFT,
+ CONFIG_SYS_NS16550_IER);
+ serial_out_shift(&com_port->mcr, CONFIG_DEBUG_UART_SHIFT, UART_MCRVAL);
+ serial_out_shift(&com_port->fcr, CONFIG_DEBUG_UART_SHIFT, UART_FCRVAL);
+
+ serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT,
+ UART_LCR_BKSE | UART_LCRVAL);
+ serial_out_shift(&com_port->dll, CONFIG_DEBUG_UART_SHIFT,
+ baud_divisor & 0xff);
+ serial_out_shift(&com_port->dlm, CONFIG_DEBUG_UART_SHIFT,
+ (baud_divisor >> 8) & 0xff);
+ serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT,
+ UART_LCRVAL);
}
static inline void _debug_uart_putc(int ch)
@@ -270,7 +276,7 @@ static inline void _debug_uart_putc(int ch)
while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE))
;
- serial_out_shift(&com_port->thr, 0, ch);
+ serial_out_shift(&com_port->thr, CONFIG_DEBUG_UART_SHIFT, ch);
}
DEBUG_UART_FUNCS
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 2de37377397..b8c2f482288 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -70,7 +70,7 @@ static void serial_find_console_or_panic(void)
if (uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) &&
uclass_get_device(UCLASS_SERIAL, INDEX, &dev) &&
(uclass_first_device(UCLASS_SERIAL, &dev) || !dev))
- panic("No serial driver found");
+ panic_str("No serial driver found");
#undef INDEX
gd->cur_serial_dev = dev;
}
@@ -251,7 +251,7 @@ static int serial_post_probe(struct udevice *dev)
{
struct dm_serial_ops *ops = serial_get_ops(dev);
#ifdef CONFIG_DM_STDIO
- struct serial_dev_priv *upriv = dev->uclass_priv;
+ struct serial_dev_priv *upriv = dev_get_uclass_priv(dev);
struct stdio_dev sdev;
#endif
int ret;
@@ -299,7 +299,7 @@ static int serial_post_probe(struct udevice *dev)
static int serial_pre_remove(struct udevice *dev)
{
#ifdef CONFIG_SYS_STDIO_DEREGISTER
- struct serial_dev_priv *upriv = dev->uclass_priv;
+ struct serial_dev_priv *upriv = dev_get_uclass_priv(dev);
if (stdio_deregister_dev(upriv->sdev, 0))
return -EPERM;
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 9f78492298d..699c410d663 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -154,6 +154,7 @@ serial_initfunc(sa1100_serial_initialize);
serial_initfunc(sandbox_serial_initialize);
serial_initfunc(sconsole_serial_initialize);
serial_initfunc(sh_serial_initialize);
+serial_initfunc(stm32_serial_initialize);
serial_initfunc(uartlite_serial_initialize);
serial_initfunc(zynq_serial_initialize);
@@ -246,6 +247,7 @@ void serial_initialize(void)
sandbox_serial_initialize();
sconsole_serial_initialize();
sh_serial_initialize();
+ stm32_serial_initialize();
uartlite_serial_initialize();
zynq_serial_initialize();
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 75eb6bd729e..2124161734c 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -95,7 +95,7 @@ static int pl01x_generic_serial_init(struct pl01x_regs *regs,
return 0;
}
-static int set_line_control(struct pl01x_regs *regs)
+static int pl011_set_line_control(struct pl01x_regs *regs)
{
unsigned int lcr;
/*
@@ -129,6 +129,9 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
case TYPE_PL010: {
unsigned int divisor;
+ /* disable everything */
+ writel(0, &regs->pl010_cr);
+
switch (baudrate) {
case 9600:
divisor = UART_PL010_BAUD_9600;
@@ -152,6 +155,12 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
writel((divisor & 0xf00) >> 8, &regs->pl010_lcrm);
writel(divisor & 0xff, &regs->pl010_lcrl);
+ /*
+ * Set line control for the PL010 to be 8 bits, 1 stop bit,
+ * no parity, fifo enabled
+ */
+ writel(UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN,
+ &regs->pl010_lcrh);
/* Finally, enable the UART */
writel(UART_PL010_CR_UARTEN, &regs->pl010_cr);
break;
@@ -178,7 +187,7 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
writel(divider, &regs->pl011_ibrd);
writel(fraction, &regs->pl011_fbrd);
- set_line_control(regs);
+ pl011_set_line_control(regs);
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
UART_PL011_CR_RXE | UART_PL011_CR_RTS, &regs->pl011_cr);
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
new file mode 100644
index 00000000000..3c800961d1a
--- /dev/null
+++ b/drivers/serial/serial_stm32.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <rev13@wp.pl>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <serial.h>
+#include <asm/arch/stm32.h>
+
+#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
+#define RCC_APB2ENR_USART1EN (1 << 4)
+
+#define USART_BASE STM32_USART1_BASE
+#define RCC_USART_ENABLE RCC_APB2ENR_USART1EN
+
+struct stm32_serial {
+ u32 sr;
+ u32 dr;
+ u32 brr;
+ u32 cr1;
+ u32 cr2;
+ u32 cr3;
+ u32 gtpr;
+};
+
+#define USART_CR1_RE (1 << 2)
+#define USART_CR1_TE (1 << 3)
+#define USART_CR1_UE (1 << 13)
+
+#define USART_SR_FLAG_RXNE (1 << 5)
+#define USART_SR_FLAG_TXE (1 << 7)
+
+#define USART_BRR_F_MASK 0xF
+#define USART_BRR_M_SHIFT 4
+#define USART_BRR_M_MASK 0xFFF0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void stm32_serial_setbrg(void)
+{
+ serial_init();
+}
+
+static int stm32_serial_init(void)
+{
+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+ u32 clock, int_div, frac_div, tmp;
+
+ if ((USART_BASE & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE) {
+ setbits_le32(&STM32_RCC->apb1enr, RCC_USART_ENABLE);
+ clock = clock_get(CLOCK_APB1);
+ } else if ((USART_BASE & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE) {
+ setbits_le32(&STM32_RCC->apb2enr, RCC_USART_ENABLE);
+ clock = clock_get(CLOCK_APB2);
+ } else {
+ return -1;
+ }
+
+ int_div = (25 * clock) / (4 * gd->baudrate);
+ tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
+ frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
+ tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
+
+ writel(tmp, &usart->brr);
+ setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+
+ return 0;
+}
+
+static int stm32_serial_getc(void)
+{
+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+ while ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
+ ;
+ return readl(&usart->dr);
+}
+
+static void stm32_serial_putc(const char c)
+{
+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+ while ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
+ ;
+ writel(c, &usart->dr);
+}
+
+static int stm32_serial_tstc(void)
+{
+ struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
+ u8 ret;
+
+ ret = readl(&usart->sr) & USART_SR_FLAG_RXNE;
+ return ret;
+}
+
+static struct serial_device stm32_serial_drv = {
+ .name = "stm32_serial",
+ .start = stm32_serial_init,
+ .stop = NULL,
+ .setbrg = stm32_serial_setbrg,
+ .putc = stm32_serial_putc,
+ .puts = default_serial_puts,
+ .getc = stm32_serial_getc,
+ .tstc = stm32_serial_tstc,
+};
+
+void stm32_serial_initialize(void)
+{
+ serial_register(&stm32_serial_drv);
+}
+
+__weak struct serial_device *default_serial_console(void)
+{
+ return &stm32_serial_drv;
+}
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index 98e3b812e0b..74547eb692b 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -11,6 +11,7 @@
#include <asm/errno.h>
#include <dm/device.h>
#include <dm/platform_data/serial-uniphier.h>
+#include <mapmem.h>
#include <serial.h>
#include <fdtdec.h>
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 3e2b8dc183e..9278763164f 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -48,10 +48,16 @@ static void uart_zynq_serial_setbrg(const int port)
/* Calculation results. */
unsigned int calc_bauderror, bdiv, bgen;
unsigned long calc_baud = 0;
- unsigned long baud = gd->baudrate;
+ unsigned long baud;
unsigned long clock = get_uart_clk(port);
struct uart_zynq *regs = uart_zynq_ports[port];
+ /* Covering case where input clock is so slow */
+ if (clock < 1000000 && gd->baudrate > 4800)
+ gd->baudrate = 4800;
+
+ baud = gd->baudrate;
+
/* master clock
* Baud rate = ------------------
* bgen * (bdiv + 1)