diff options
author | Tom Rini | 2022-03-30 18:07:23 -0400 |
---|---|---|
committer | Tom Rini | 2022-04-08 10:46:22 -0400 |
commit | 55b3ba4c2ba4c464491604c5da63debae72aa5c6 (patch) | |
tree | d9c1f95b2ba4e6b44b917431a764afcced7fe72b /drivers/spi/cadence_qspi.c | |
parent | 5d14c336b21da34d07e93b5689ccffd52b8cc658 (diff) |
spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig
This is a little tricky since SoCFPGA has code to determine this as
runtime. Introduce a guard variable for platforms to select if they
have a static value to use. Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/spi/cadence_qspi.c')
-rw-r--r-- | drivers/spi/cadence_qspi.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index db680618ee9..7209bb43a77 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -188,8 +188,10 @@ static int cadence_spi_probe(struct udevice *bus) if (plat->ref_clk_hz == 0) { ret = clk_get_by_index(bus, 0, &clk); if (ret) { -#ifdef CONFIG_CQSPI_REF_CLK +#ifdef CONFIG_HAS_CQSPI_REF_CLK plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK; +#elif defined(CONFIG_ARCH_SOCFPGA) + plat->ref_clk_hz = cm_get_qspi_controller_clk_hz(); #else return ret; #endif |