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authorSimon Glass2019-12-06 21:42:37 -0700
committerBin Meng2019-12-15 11:44:21 +0800
commit674990c0dc21ecedaddb1f923455027bd489914c (patch)
tree6ddcc710d3768156712a7f02c6aa2a1430ae2557 /drivers/spi/ich.c
parente8ac6ffe0459a8e89dab5e4f1878ad07a05ee4e2 (diff)
spi: ich: Move init function just above probe()
It is annoying to have some of the init code in a different part of the file. Move ich_init_controller() to just above probe() to keep things together. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/spi/ich.c')
-rw-r--r--drivers/spi/ich.c122
1 files changed, 61 insertions, 61 deletions
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index a4e4ad55c69..3eb4599ba27 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -112,67 +112,6 @@ static int ich9_can_do_33mhz(struct udevice *dev)
return speed == 1;
}
-static int ich_init_controller(struct udevice *dev,
- struct ich_spi_platdata *plat,
- struct ich_spi_priv *ctlr)
-{
- ulong sbase_addr;
- void *sbase;
-
- /* SBASE is similar */
- pch_get_spi_base(dev->parent, &sbase_addr);
- sbase = (void *)sbase_addr;
- debug("%s: sbase=%p\n", __func__, sbase);
-
- if (plat->ich_version == ICHV_7) {
- struct ich7_spi_regs *ich7_spi = sbase;
-
- ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu);
- ctlr->menubytes = sizeof(ich7_spi->opmenu);
- ctlr->optype = offsetof(struct ich7_spi_regs, optype);
- ctlr->addr = offsetof(struct ich7_spi_regs, spia);
- ctlr->data = offsetof(struct ich7_spi_regs, spid);
- ctlr->databytes = sizeof(ich7_spi->spid);
- ctlr->status = offsetof(struct ich7_spi_regs, spis);
- ctlr->control = offsetof(struct ich7_spi_regs, spic);
- ctlr->bbar = offsetof(struct ich7_spi_regs, bbar);
- ctlr->preop = offsetof(struct ich7_spi_regs, preop);
- ctlr->base = ich7_spi;
- } else if (plat->ich_version == ICHV_9) {
- struct ich9_spi_regs *ich9_spi = sbase;
-
- ctlr->opmenu = offsetof(struct ich9_spi_regs, opmenu);
- ctlr->menubytes = sizeof(ich9_spi->opmenu);
- ctlr->optype = offsetof(struct ich9_spi_regs, optype);
- ctlr->addr = offsetof(struct ich9_spi_regs, faddr);
- ctlr->data = offsetof(struct ich9_spi_regs, fdata);
- ctlr->databytes = sizeof(ich9_spi->fdata);
- ctlr->status = offsetof(struct ich9_spi_regs, ssfs);
- ctlr->control = offsetof(struct ich9_spi_regs, ssfc);
- ctlr->speed = ctlr->control + 2;
- ctlr->bbar = offsetof(struct ich9_spi_regs, bbar);
- ctlr->preop = offsetof(struct ich9_spi_regs, preop);
- ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
- ctlr->pr = &ich9_spi->pr[0];
- ctlr->base = ich9_spi;
- } else {
- debug("ICH SPI: Unrecognised ICH version %d\n",
- plat->ich_version);
- return -EINVAL;
- }
-
- /* Work out the maximum speed we can support */
- ctlr->max_speed = 20000000;
- if (plat->ich_version == ICHV_9 && ich9_can_do_33mhz(dev))
- ctlr->max_speed = 33000000;
- debug("ICH SPI: Version ID %d detected at %p, speed %ld\n",
- plat->ich_version, ctlr->base, ctlr->max_speed);
-
- ich_set_bbar(ctlr, 0);
-
- return 0;
-}
-
static void spi_lock_down(struct ich_spi_platdata *plat, void *sbase)
{
if (plat->ich_version == ICHV_7) {
@@ -493,6 +432,67 @@ static int ich_spi_adjust_size(struct spi_slave *slave, struct spi_mem_op *op)
return 0;
}
+static int ich_init_controller(struct udevice *dev,
+ struct ich_spi_platdata *plat,
+ struct ich_spi_priv *ctlr)
+{
+ ulong sbase_addr;
+ void *sbase;
+
+ /* SBASE is similar */
+ pch_get_spi_base(dev->parent, &sbase_addr);
+ sbase = (void *)sbase_addr;
+ debug("%s: sbase=%p\n", __func__, sbase);
+
+ if (plat->ich_version == ICHV_7) {
+ struct ich7_spi_regs *ich7_spi = sbase;
+
+ ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu);
+ ctlr->menubytes = sizeof(ich7_spi->opmenu);
+ ctlr->optype = offsetof(struct ich7_spi_regs, optype);
+ ctlr->addr = offsetof(struct ich7_spi_regs, spia);
+ ctlr->data = offsetof(struct ich7_spi_regs, spid);
+ ctlr->databytes = sizeof(ich7_spi->spid);
+ ctlr->status = offsetof(struct ich7_spi_regs, spis);
+ ctlr->control = offsetof(struct ich7_spi_regs, spic);
+ ctlr->bbar = offsetof(struct ich7_spi_regs, bbar);
+ ctlr->preop = offsetof(struct ich7_spi_regs, preop);
+ ctlr->base = ich7_spi;
+ } else if (plat->ich_version == ICHV_9) {
+ struct ich9_spi_regs *ich9_spi = sbase;
+
+ ctlr->opmenu = offsetof(struct ich9_spi_regs, opmenu);
+ ctlr->menubytes = sizeof(ich9_spi->opmenu);
+ ctlr->optype = offsetof(struct ich9_spi_regs, optype);
+ ctlr->addr = offsetof(struct ich9_spi_regs, faddr);
+ ctlr->data = offsetof(struct ich9_spi_regs, fdata);
+ ctlr->databytes = sizeof(ich9_spi->fdata);
+ ctlr->status = offsetof(struct ich9_spi_regs, ssfs);
+ ctlr->control = offsetof(struct ich9_spi_regs, ssfc);
+ ctlr->speed = ctlr->control + 2;
+ ctlr->bbar = offsetof(struct ich9_spi_regs, bbar);
+ ctlr->preop = offsetof(struct ich9_spi_regs, preop);
+ ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
+ ctlr->pr = &ich9_spi->pr[0];
+ ctlr->base = ich9_spi;
+ } else {
+ debug("ICH SPI: Unrecognised ICH version %d\n",
+ plat->ich_version);
+ return -EINVAL;
+ }
+
+ /* Work out the maximum speed we can support */
+ ctlr->max_speed = 20000000;
+ if (plat->ich_version == ICHV_9 && ich9_can_do_33mhz(dev))
+ ctlr->max_speed = 33000000;
+ debug("ICH SPI: Version ID %d detected at %p, speed %ld\n",
+ plat->ich_version, ctlr->base, ctlr->max_speed);
+
+ ich_set_bbar(ctlr, 0);
+
+ return 0;
+}
+
static int ich_spi_probe(struct udevice *dev)
{
struct ich_spi_platdata *plat = dev_get_platdata(dev);