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authorTom Rini2021-01-06 07:57:33 -0500
committerTom Rini2021-01-06 07:57:33 -0500
commitbc0b99bd8b19599f670f42401de655fa9b44cd94 (patch)
tree8f5294dc16657c32b1a401c13a1f2a0579ac62e2 /drivers/spi
parentb11f634b1c1be6ab419758c6596c673445e5ac70 (diff)
parent0109db1cd1e63b35c1c84d6bc2ccaa26aa6b7ce3 (diff)
Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/zynqmp_gqspi.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index c9e476eefac..efcbd0557fb 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -429,10 +429,8 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size)
data |= GENMASK(31, 16);
break;
case 3:
- data = *((u16 *)buf);
- buf += 2;
- data |= (*((u8 *)buf) << 16);
- buf += 1;
+ data = *buf;
+ buf += 3;
data |= GENMASK(31, 24);
break;
}