diff options
| author | Christophe Kerello | 2018-07-09 15:32:38 +0200 |
|---|---|---|
| committer | Tom Rini | 2018-07-23 14:33:21 -0400 |
| commit | d68b6ad1382b5357e77ce6b4d3fd74831835d62e (patch) | |
| tree | a0a1b6f9a863c1fb626f9f7e4557d659a85070aa /drivers/spi | |
| parent | ceff933e1e359e03bff17b22c0599ee29c4c5924 (diff) | |
spi: stm32_qspi: rework mode management
This patch solves quad read issue with Macronix/Micron spi nor.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/stm32_qspi.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 81b84625ba5..3b92254a5ce 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -229,21 +229,21 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode) imode = STM32_QSPI_CCR_IMODE_ONE_LINE; admode = STM32_QSPI_CCR_ADMODE_ONE_LINE; - - if (mode & SPI_RX_QUAD) { - dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE; - if (mode & SPI_TX_QUAD) { - imode = STM32_QSPI_CCR_IMODE_FOUR_LINE; - admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE; - } - } else if (mode & SPI_RX_DUAL) { - dmode = STM32_QSPI_CCR_DMODE_TWO_LINE; - if (mode & SPI_TX_DUAL) { - imode = STM32_QSPI_CCR_IMODE_TWO_LINE; - admode = STM32_QSPI_CCR_ADMODE_TWO_LINE; + dmode = STM32_QSPI_CCR_DMODE_ONE_LINE; + + if ((priv->command & CMD_HAS_ADR) && (priv->command & CMD_HAS_DATA)) { + if (fmode == STM32_QSPI_CCR_IND_WRITE) { + if (mode & SPI_TX_QUAD) + dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE; + else if (mode & SPI_TX_DUAL) + dmode = STM32_QSPI_CCR_DMODE_TWO_LINE; + } else if ((fmode == STM32_QSPI_CCR_MEM_MAP) || + (fmode == STM32_QSPI_CCR_IND_READ)) { + if (mode & SPI_RX_QUAD) + dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE; + else if (mode & SPI_RX_DUAL) + dmode = STM32_QSPI_CCR_DMODE_TWO_LINE; } - } else { - dmode = STM32_QSPI_CCR_DMODE_ONE_LINE; } if (priv->command & CMD_HAS_DATA) |