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authorTom Rini2020-01-27 07:19:26 -0500
committerTom Rini2020-01-27 07:19:26 -0500
commit051e03c0d76b7ce9d4649f76f5be979d8f88e765 (patch)
tree63fe3ac6155edc9de3784d64521707ebc0fc4e4d /drivers
parentc05b38df477a50c3918b50c5f986592411785859 (diff)
parent2f39ab1649caddf748ef1eff60c40fede5995ced (diff)
Merge tag 'u-boot-clk-26Jan2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Various clock fixes and enhancements
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/clk-uclass.c2
-rw-r--r--drivers/clk/clk.c6
-rw-r--r--drivers/clk/imx/clk-imx6q.c2
-rw-r--r--drivers/clk/imx/clk-imx8mm.c2
-rw-r--r--drivers/clk/imx/clk-imx8mn.c2
-rw-r--r--drivers/clk/imx/clk-pllv3.c23
-rw-r--r--drivers/clk/mediatek/clk-mtk.c2
7 files changed, 28 insertions, 11 deletions
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 93cb490eb53..0df38bd06a4 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -326,7 +326,6 @@ int clk_set_defaults(struct udevice *dev, int stage)
return 0;
}
-# endif /* OF_PLATDATA */
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
{
@@ -343,6 +342,7 @@ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
return clk_get_by_index(dev, index, clk);
}
+# endif /* OF_PLATDATA */
int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
{
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 1cf9987f6cb..4c477a488e1 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -20,8 +20,10 @@ int clk_register(struct clk *clk, const char *drv_name,
int ret;
ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent);
- if (ret)
- printf("%s: UCLASS parent: 0x%p\n", __func__, parent);
+ if (ret) {
+ printf("%s: name: %s parent: %s [0x%p]\n",
+ __func__, name, parent->name, parent);
+ }
debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, parent->name,
parent);
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 5ae4781d11d..bd0d3e4f472 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -115,7 +115,7 @@ static int imx6q_clk_probe(struct udevice *dev)
/* CCM clocks */
base = dev_read_addr_ptr(dev);
- if (base == (void *)FDT_ADDR_T_NONE)
+ if (!base)
return -EINVAL;
clk_dm(IMX6QDL_CLK_USDHC1_SEL,
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index a05dac7c7a1..fc41a028f6c 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -323,7 +323,7 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1));
base = dev_read_addr_ptr(dev);
- if (base == (void *)FDT_ADDR_T_NONE)
+ if (!base)
return -EINVAL;
clk_dm(IMX8MM_CLK_A53_SRC,
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 4048cc63ccd..eb43971ae6f 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -293,7 +293,7 @@ static int imx8mn_clk_probe(struct udevice *dev)
imx_clk_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1));
base = dev_read_addr_ptr(dev);
- if (base == (void *)FDT_ADDR_T_NONE)
+ if (!base)
return -EINVAL;
clk_dm(IMX8MN_CLK_A53_SRC,
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index fc16416d5fb..0cdb9df45d9 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -121,10 +121,16 @@ static ulong clk_pllv3_sys_set_rate(struct clk *clk, ulong rate)
{
struct clk_pllv3 *pll = to_clk_pllv3(clk);
unsigned long parent_rate = clk_get_parent_rate(clk);
- unsigned long min_rate = parent_rate * 54 / 2;
- unsigned long max_rate = parent_rate * 108 / 2;
+ unsigned long min_rate;
+ unsigned long max_rate;
u32 val, div;
+ if (parent_rate == 0)
+ return -EINVAL;
+
+ min_rate = parent_rate * 54 / 2;
+ max_rate = parent_rate * 108 / 2;
+
if (rate < min_rate || rate > max_rate)
return -EINVAL;
@@ -157,6 +163,9 @@ static ulong clk_pllv3_av_get_rate(struct clk *clk)
u32 div = readl(pll->base) & pll->div_mask;
u64 temp64 = (u64)parent_rate;
+ if (mfd == 0)
+ return -EIO;
+
temp64 *= mfn;
do_div(temp64, mfd);
@@ -167,13 +176,19 @@ static ulong clk_pllv3_av_set_rate(struct clk *clk, ulong rate)
{
struct clk_pllv3 *pll = to_clk_pllv3(clk);
unsigned long parent_rate = clk_get_parent_rate(clk);
- unsigned long min_rate = parent_rate * 27;
- unsigned long max_rate = parent_rate * 54;
+ unsigned long min_rate;
+ unsigned long max_rate;
u32 val, div;
u32 mfn, mfd = 1000000;
u32 max_mfd = 0x3FFFFFFF;
u64 temp64;
+ if (parent_rate == 0)
+ return -EINVAL;
+
+ min_rate = parent_rate * 27;
+ max_rate = parent_rate * 54;
+
if (rate < min_rate || rate > max_rate)
return -EINVAL;
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 09ae2d48601..c52537cedf3 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -40,7 +40,7 @@
* the accurate frequency.
*/
static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,
- const struct driver *drv)
+ const struct driver *drv)
{
struct clk parent = { .id = id, };