Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next

- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC

4 files changed, 35 insertions, 1 deletions

diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 7035b59a137..4b0028d04bf 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -291,6 +291,13 @@ static int meson_clk_probe(struct udevice *dev)
 	if (IS_ERR(priv->map))
 		return PTR_ERR(priv->map);
 
+	/*
+	 * Depending on the boot src, the state of the MMC clock might
+	 * be different. Reset it to make sure we won't get stuck
+	 */
+	regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
+	regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
+
 	debug("meson-clk-axg: probed\n");
 
 	return 0;
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 686d94ebfe8..c1976aa1efb 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -804,6 +804,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id)
 		break;
 	case CLKID_PCIE_PLL:
 		rate = meson_pcie_pll_get_rate(clk);
+		break;
 	case CLKID_VPU_0:
 		rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV);
 		break;
@@ -977,6 +978,13 @@ static int meson_clk_probe(struct udevice *dev)
 	if (IS_ERR(priv->map))
 		return PTR_ERR(priv->map);
 
+	/*
+	 * Depending on the boot src, the state of the MMC clock might
+	 * be different. Reset it to make sure we won't get stuck
+	 */
+	regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
+	regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
+
 	debug("meson-clk-g12a: probed\n");
 
 	return 0;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index e781e08d9d5..5ef4dd794d5 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -887,6 +887,13 @@ static int meson_clk_probe(struct udevice *dev)
 	if (IS_ERR(priv->map))
 		return PTR_ERR(priv->map);
 
+	/*
+	 * Depending on the boot src, the state of the MMC clock might
+	 * be different. Reset it to make sure we won't get stuck
+	 */
+	regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
+	regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
+
 	debug("meson-clk: probed\n");
 
 	return 0;
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index b5f5122b1b7..86c1a7164a9 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
@@ -241,12 +242,23 @@ static int meson_mmc_probe(struct udevice *dev)
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 	struct mmc *mmc = &pdata->mmc;
 	struct mmc_config *cfg = &pdata->cfg;
+	struct clk_bulk clocks;
 	uint32_t val;
+	int ret;
+
 #ifdef CONFIG_PWRSEQ
 	struct udevice *pwr_dev;
-	int ret;
 #endif
 
+	/* Enable the clocks feeding the MMC controller */
+	ret = clk_get_bulk(dev, &clocks);
+	if (ret)
+		return ret;
+
+	ret = clk_enable_bulk(&clocks);
+	if (ret)
+		return ret;
+
 	cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 |
 			MMC_VDD_31_32 | MMC_VDD_165_195;
 	cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |