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authorLokesh Vutla2018-08-16 18:41:49 +0530
committerTom Rini2018-09-10 20:48:20 -0400
commit5a07cf5e7ae8cfe1266ef4fc445c947cb649a081 (patch)
treeff6c3de5c9bf657bf67a1b76207eed95a7a04723 /drivers
parent84b4221cffa805ab525be9a2d580f40f6d9a0243 (diff)
pinctrl: Fix build warning with ARM64
Following build warning appears when pinctrl-single is built for ARM64: In file included from drivers/pinctrl/pinctrl-single.c:10:0: drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’: ./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) Fix this by using phys_addr_t for variable reg instead of u32 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/pinctrl-single.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 296eb63cc49..d80c6eda70e 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -43,13 +43,13 @@ static int single_configure_pins(struct udevice *dev,
{
struct single_pdata *pdata = dev->platdata;
int count = size / sizeof(struct single_fdt_pin_cfg);
- int n, reg;
+ phys_addr_t n, reg;
u32 val;
for (n = 0; n < count; n++, pins++) {
reg = fdt32_to_cpu(pins->reg);
if ((reg < 0) || (reg > pdata->offset)) {
- dev_dbg(dev, " invalid register offset 0x%08x\n", reg);
+ dev_dbg(dev, " invalid register offset 0x%pa\n", &reg);
continue;
}
reg += pdata->base;
@@ -66,7 +66,7 @@ static int single_configure_pins(struct udevice *dev,
pdata->width);
continue;
}
- dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",reg, val);
+ dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val);
}
return 0;
}