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authorPeng Fan2018-01-10 13:20:42 +0800
committerStefano Babic2018-02-04 12:00:58 +0100
commit8953d866644184e5b1088ab170a34d45a6f3c6dd (patch)
treefbdf6fd7dca409d32ffba49c4a456d5a72655723 /drivers
parent3baa9ec44a95d81efd30004ccc74ff45bf7d3355 (diff)
gpio: mxc: add i.MX8M support
Add i.MX8M GPIO support. There are 4 GPIO banks on i.MX8M. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/mxc_gpio.c22
1 files changed, 15 insertions, 7 deletions
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index cfa620bceb3..d0e365a54b0 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -41,13 +41,13 @@ static unsigned long gpio_ports[] = {
[2] = GPIO3_BASE_ADDR,
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
- defined(CONFIG_MX7)
+ defined(CONFIG_MX7) || defined(CONFIG_MX8M)
[3] = GPIO4_BASE_ADDR,
#endif
#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
- defined(CONFIG_MX7)
+ defined(CONFIG_MX7) || defined(CONFIG_MX8M)
[4] = GPIO5_BASE_ADDR,
-#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || defined(CONFIG_MX8M))
[5] = GPIO6_BASE_ADDR,
#endif
#endif
@@ -349,13 +349,17 @@ static const struct mxc_gpio_plat mxc_plat[] = {
{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
{ 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
- defined(CONFIG_MX53) || defined(CONFIG_MX6)
+ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+ defined(CONFIG_MX8M)
{ 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
#endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+ defined(CONFIG_MX8M)
{ 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
+#ifndef CONFIG_MX8M
{ 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
#endif
+#endif
#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
{ 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
#endif
@@ -366,13 +370,17 @@ U_BOOT_DEVICES(mxc_gpios) = {
{ "gpio_mxc", &mxc_plat[1] },
{ "gpio_mxc", &mxc_plat[2] },
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
- defined(CONFIG_MX53) || defined(CONFIG_MX6)
+ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+ defined(CONFIG_MX8M)
{ "gpio_mxc", &mxc_plat[3] },
#endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
+ defined(CONFIG_MX8M)
{ "gpio_mxc", &mxc_plat[4] },
+#ifndef CONFIG_MX8M
{ "gpio_mxc", &mxc_plat[5] },
#endif
+#endif
#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
{ "gpio_mxc", &mxc_plat[6] },
#endif