diff options
| author | Stefan Agner | 2014-08-19 17:54:28 +0200 |
|---|---|---|
| committer | Stefano Babic | 2014-09-09 16:54:16 +0200 |
| commit | 89e69fd4a96bcab2469d3d084ba335c6b925771a (patch) | |
| tree | e113dbf2c25453e6dd7fb3ded88813d40ff92277 /drivers | |
| parent | a3db78d8870c8fb5bc0b1acd73bdc998d0d34200 (diff) | |
arm: vf610: lpuart: disable FIFO on initializaton
UART does not use the UART FIFO, but we should also not rely that
the UART FIFO is diabled by default. For instance, when loading
U-Boot using the boot ROMs serial downloader protocol over UART,
FIFO is enabled at U-Boot start time.
This patch disables the RX and TX FIFO, sets back their thresholds
and flushes them.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/serial/serial_lpuart.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 96173ca4409..0a5e15919f6 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -17,6 +17,10 @@ #define US1_OR (1 << 3) #define UC2_TE (1 << 3) #define UC2_RE (1 << 2) +#define CFIFO_TXFLUSH (1 << 7) +#define CFIFO_RXFLUSH (1 << 6) +#define SFIFO_RXOF (1 << 2) +#define SFIFO_RXUF (1 << 0) DECLARE_GLOBAL_DATA_PTR; @@ -85,6 +89,12 @@ static int lpuart_serial_init(void) __raw_writeb(0, &base->umodem); __raw_writeb(0, &base->uc1); + /* Disable FIFO and flush buffer */ + __raw_writeb(0x0, &base->upfifo); + __raw_writeb(0x0, &base->utwfifo); + __raw_writeb(0x1, &base->urwfifo); + __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo); + /* provide data bits, parity, stop bit, etc */ serial_setbrg(); |