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authorCaleb Connolly2024-02-26 17:26:13 +0000
committerCaleb Connolly2024-03-01 14:44:36 +0000
commita2ce3aac46121e7ffa244540b62b439ddeed7a9c (patch)
treeb70678008d4a1a48ac056c6e3dfa1f2a8c031152 /drivers
parent92781cff6e7115b5a8957e6a9ded6cd7516d4fc7 (diff)
gpio: qcom_pmic: 1-based GPIOs
Qualcomm PMICs number their GPIOs starting from 1, implement a custom .xlate method to handle this. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/qcom_pmic_gpio.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index 6167c841167..2a4fef8d28c 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/drivers/gpio/qcom_pmic_gpio.c
@@ -209,12 +209,34 @@ static int qcom_gpio_set_value(struct udevice *dev, unsigned offset,
REG_CTL_OUTPUT_MASK, !!value);
}
+static int qcom_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ if (args->args_count < 1)
+ return -EINVAL;
+
+ /* GPIOs in DT are 1-based */
+ desc->offset = args->args[0] - 1;
+ if (desc->offset >= uc_priv->gpio_count)
+ return -EINVAL;
+
+ if (args->args_count < 2)
+ return 0;
+
+ desc->flags = gpio_flags_xlate(args->args[1]);
+
+ return 0;
+}
+
static const struct dm_gpio_ops qcom_gpio_ops = {
.direction_input = qcom_gpio_direction_input,
.direction_output = qcom_gpio_direction_output,
.get_value = qcom_gpio_get_value,
.set_value = qcom_gpio_set_value,
.get_function = qcom_gpio_get_function,
+ .xlate = qcom_gpio_xlate,
};
static int qcom_gpio_probe(struct udevice *dev)