diff options
| author | Pali Rohár | 2021-10-12 13:19:19 +0200 |
|---|---|---|
| committer | Stefan Roese | 2021-10-21 07:39:05 +0200 |
| commit | aaddce0d35f5ec3f9dc021401c56081a3bd05ebd (patch) | |
| tree | e28534f447d31e1ecc247c5ad058c5a308c79eae /drivers | |
| parent | 6d7bfb658e6dccbf2c82981558239685cb664b29 (diff) | |
arm: a37xx: pci: Do not allow setting bars on PCI Bridge
PCI Bridge which represents Aardvark PCIe Root Port does not have
configurable bars.
So ensure that write operation to bars registers on PCI Bridge is noop and
bars registers always contain zero address which indicates that bars are
unsupported.
After this change U-Boot 'pci bar 0.0.0' command does not show any
allocated bars for PCI Bridge device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/pci-aardvark.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 38eff495ab1..ade5ab056f8 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -581,6 +581,10 @@ static int pcie_advk_write_config(struct udevice *bus, pci_dev_t bdf, if (offset >= 0x10 && offset < 0x34) { data = pcie->cfgcache[(offset - 0x10) / 4]; data = pci_conv_size_to_32(data, value, offset, size); + /* This PCI bridge does not have configurable bars */ + if ((offset & ~3) == PCI_BASE_ADDRESS_0 || + (offset & ~3) == PCI_BASE_ADDRESS_1) + data = 0x0; pcie->cfgcache[(offset - 0x10) / 4] = data; } else if ((offset & ~3) == PCI_ROM_ADDRESS1) { data = advk_readl(pcie, PCIE_CORE_EXP_ROM_BAR_REG); |