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authorSimon Glass2016-01-17 16:11:44 -0700
committerBin Meng2016-01-24 12:09:40 +0800
commitabb0b01e7a22c4a1f3fdd2301fae7276e857b04b (patch)
tree2c31a75b3f0381c0895ec08c592e4998791a8dc5 /drivers
parent433650a2fc29523b765342fbd0374c5b16ffcc29 (diff)
x86: i2c: Add a stub driver for Intel I2C/SMbus
This is used on most Intel platforms. We don't have a driver for it yet, but add a stub to handle the init. For now this targets ivybridge so we may want to add a device tree binding and generalise it when other platforms are supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/Kconfig9
-rw-r--r--drivers/i2c/Makefile1
-rw-r--r--drivers/i2c/intel_i2c.c51
3 files changed, 61 insertions, 0 deletions
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 14adda2857d..46b83e78941 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -58,6 +58,15 @@ config DM_I2C_GPIO
bindings are supported.
Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
+config SYS_I2C_INTEL
+ bool "Intel I2C/SMBUS driver"
+ depends on DM_I2C
+ help
+ Add support for the Intel SMBUS driver. So far this driver is just
+ a stub which perhaps some basic init. There is no implementation of
+ the I2C API meaning that any I2C operations will immediately fail
+ for now.
+
config SYS_I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index bbbc0dc59d6..c75c5793efe 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
+obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c
new file mode 100644
index 00000000000..1082d1a3ed6
--- /dev/null
+++ b/drivers/i2c/intel_i2c.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <asm/io.h>
+
+int intel_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
+{
+ return -ENOSYS;
+}
+
+int intel_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags)
+{
+ return -ENOSYS;
+}
+
+int intel_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+ return 0;
+}
+
+static int intel_i2c_probe(struct udevice *dev)
+{
+ return 0;
+}
+
+static const struct dm_i2c_ops intel_i2c_ops = {
+ .xfer = intel_i2c_xfer,
+ .probe_chip = intel_i2c_probe_chip,
+ .set_bus_speed = intel_i2c_set_bus_speed,
+};
+
+static const struct udevice_id intel_i2c_ids[] = {
+ { .compatible = "intel,ich-i2c" },
+ { }
+};
+
+U_BOOT_DRIVER(intel_i2c) = {
+ .name = "i2c_intel",
+ .id = UCLASS_I2C,
+ .of_match = intel_i2c_ids,
+ .per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
+ .ops = &intel_i2c_ops,
+ .probe = intel_i2c_probe,
+};