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authorWadim Egorov2018-03-19 16:39:29 +0100
committerPhilipp Tomsich2018-04-25 14:05:09 +0200
commitb0ba1e7e9d9b9441a18048ec67a3b3100c096975 (patch)
tree9826fc6d33cd78f12d9e30ef92baa0d6dd1c5031 /drivers
parent5512f5ccf1dc5cec068f8efa1d8ce81f51a988d3 (diff)
rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/rockchip/clk_rk3288.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 3a36d04096b..78ada2d2db4 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par
return -ENOENT;
}
+static int rk3288_clk_enable(struct clk *clk)
+{
+ switch (clk->id) {
+ case HCLK_USBHOST0:
+ case HCLK_HSIC:
+ return 0;
+ }
+
+ debug("%s: unsupported clk %ld\n", __func__, clk->id);
+ return -ENOENT;
+}
+
static struct clk_ops rk3288_clk_ops = {
.get_rate = rk3288_clk_get_rate,
.set_rate = rk3288_clk_set_rate,
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.set_parent = rk3288_clk_set_parent,
#endif
+ .enable = rk3288_clk_enable,
};
static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)