drivers/sysreset: group sysreset drivers

Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

12 files changed, 212 insertions, 12 deletions

diff --git a/drivers/Kconfig b/drivers/Kconfig
index f6003a0a593..4f844699555 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -68,6 +68,8 @@ source "drivers/spi/Kconfig"
 
 source "drivers/spmi/Kconfig"
 
+source "drivers/sysreset/Kconfig"
+
 source "drivers/thermal/Kconfig"
 
 source "drivers/timer/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index ad5cbae7caa..7861d346036 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
 obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
-obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/
+obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
 obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/
 obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
@@ -59,6 +59,7 @@ obj-$(CONFIG_X86) += pch/
 obj-y += rtc/
 obj-y += sound/
 obj-y += spmi/
+obj-y += sysreset/
 obj-y += timer/
 obj-y += tpm/
 obj-y += twserial/
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b84e351da7c..80c15581b92 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -121,15 +121,6 @@ config PCA9551_I2C_ADDR
 	help
 	  The I2C address of the PCA9551 LED controller.
 
-config SYSRESET
-	bool "Enable support for system reset drivers"
-	depends on DM
-	help
-	  Enable system reset drivers which can be used to reset the CPU or
-	  board. Each driver can provide a reset method which will be called
-	  to effect a reset. The uclass will try all available drivers when
-	  reset_walk() is called.
-
 config WINBOND_W83627
 	bool "Enable Winbond Super I/O driver"
 	help
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index fff6f0cdf95..af541c6784d 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
 obj-$(CONFIG_NS87308) += ns87308.o
 obj-$(CONFIG_PDSP188x) += pdsp188x.o
 obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
-obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 ifdef CONFIG_DM_I2C
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
@@ -47,7 +46,6 @@ obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
 obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
 obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
-obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
new file mode 100644
index 00000000000..05a37b9a14c
--- /dev/null
+++ b/drivers/sysreset/Kconfig
@@ -0,0 +1,16 @@
+#
+# System reset devices
+#
+
+menu "System reset device drivers"
+
+config SYSRESET
+	bool "Enable support for system reset drivers"
+	depends on DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
+endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
new file mode 100644
index 00000000000..7db1b69acca
--- /dev/null
+++ b/drivers/sysreset/Makefile
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2016 Cadence Design Systems Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
+endif
+obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
+obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
+obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
diff --git a/drivers/misc/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 3566d17fb1b..3566d17fb1b 100644
--- a/drivers/misc/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
diff --git a/drivers/sysreset/sysreset_rk3036.c b/drivers/sysreset/sysreset_rk3036.c
new file mode 100644
index 00000000000..b3d21132399
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3036.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3036.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3036_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3036_sysreset = {
+	.request	= rk3036_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3036) = {
+	.name	= "rk3036_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3036_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rk3288.c b/drivers/sysreset/sysreset_rk3288.c
new file mode 100644
index 00000000000..0aad1c21601
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3288.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3288_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3288_sysreset = {
+	.request	= rk3288_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3288) = {
+	.name	= "rk3288_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3288_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rk3399.c b/drivers/sysreset/sysreset_rk3399.c
new file mode 100644
index 00000000000..9a555464c66
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3399.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3399_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3399_sysreset = {
+	.request	= rk3399_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3399) = {
+	.name	= "rk3399_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3399_sysreset,
+};
diff --git a/drivers/misc/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c
index 7ae7f386ee0..7ae7f386ee0 100644
--- a/drivers/misc/sysreset_sandbox.c
+++ b/drivers/sysreset/sysreset_sandbox.c
diff --git a/drivers/sysreset/sysreset_snapdragon.c b/drivers/sysreset/sysreset_snapdragon.c
new file mode 100644
index 00000000000..a6cabfb8b01
--- /dev/null
+++ b/drivers/sysreset/sysreset_snapdragon.c
@@ -0,0 +1,40 @@
+/*
+ * Qualcomm APQ8016 reset controller driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int msm_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	phys_addr_t addr = dev_get_addr(dev);
+	if (!addr)
+		return -EINVAL;
+	writel(0, addr);
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops msm_sysreset_ops = {
+	.request	= msm_sysreset_request,
+};
+
+static const struct udevice_id msm_sysreset_ids[] = {
+	{ .compatible = "qcom,pshold" },
+	{ }
+};
+
+U_BOOT_DRIVER(msm_reset) = {
+	.name		= "msm_sysreset",
+	.id		= UCLASS_SYSRESET,
+	.of_match	= msm_sysreset_ids,
+	.ops		= &msm_sysreset_ops,
+};