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authorMarek Vasut2019-02-13 20:16:20 +0100
committerMarek Vasut2019-04-29 10:08:56 +0200
commitbdb5df1a06777c3363b4579f5370f852635cb977 (patch)
treed7d9a83b5ac8c9c3f90a755e5f2b9efa3e346153 /drivers
parent6ad5aec419782955fa4be79c93f2640fc043f3cf (diff)
mmc: dw_mmc: Round up descriptor end to nearest multiple of cacheline size
The driver currently calculates the end address of cache flush operation for the DMA descriptors by adding cacheline size to the start address of the last DMA descriptor. This is not safe, as the cacheline size may be, in some unlikely cases, smaller than the DMA descriptor size. Replace the addition with roundup() applied on the end address of the last DMA descriptor to round it up to the nearest cacheline size multiple. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/dw_mmc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 2faaa43911b..1992d611821 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -74,15 +74,15 @@ static void dwmci_prepare_data(struct dwmci_host *host,
dwmci_set_idma_desc(cur_idmac, flags, cnt,
(ulong)bounce_buffer + (i * PAGE_SIZE));
+ cur_idmac++;
if (blk_cnt <= 8)
break;
blk_cnt -= 8;
- cur_idmac++;
i++;
} while(1);
data_end = (ulong)cur_idmac;
- flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN);
+ flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN));
ctrl = dwmci_readl(host, DWMCI_CTRL);
ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN;