diff options
author | Tom Rini | 2020-01-07 08:45:43 -0500 |
---|---|---|
committer | Tom Rini | 2020-01-07 08:45:43 -0500 |
commit | d8a3f5259a36e76d1de127f65714c40918e8ee4c (patch) | |
tree | 6a4ca1942f084a11465ad990433306c2dfdc7b55 /drivers | |
parent | ac0f978afd4b8d388b0b194bc6e5982efc383a59 (diff) | |
parent | b6e7ef4bf71bc0927dea35fdec0a653a82ae57a7 (diff) |
Merge tag 'u-boot-imx-20200107' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
New for 2020.04
---------------
- New boards
Embedded Artists COM board
Xea Board
- Switch to DM:
Aristainetos boards
Toradex colibri (DM_ETH)
iCubox
GE bx50v3
mx7dsabre (DM_ETH)
cx9020
- New features:
Bootaux with elf files
Default SYS_THUMB_BUILD for i.MX6/7
- Fixes:
DHCOM i.MX6 PDK
Engicam
i.MX8M tools (imx8m_image)
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ddr/imx/imx8m/ddr_init.c | 11 | ||||
-rw-r--r-- | drivers/ddr/imx/imx8m/ddrphy_train.c | 9 | ||||
-rw-r--r-- | drivers/ddr/imx/imx8m/ddrphy_utils.c | 8 | ||||
-rw-r--r-- | drivers/pci/pcie_imx.c | 1 | ||||
-rw-r--r-- | drivers/video/lg4573.c | 175 |
5 files changed, 157 insertions, 47 deletions
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index 21af66e4e7f..af8c1427d2e 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -20,9 +20,10 @@ void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) } } -void ddr_init(struct dram_timing_info *dram_timing) +int ddr_init(struct dram_timing_info *dram_timing) { unsigned int tmp, initial_drate, target_freq; + int ret; debug("DDRINFO: start DRAM init\n"); @@ -98,7 +99,11 @@ void ddr_init(struct dram_timing_info *dram_timing) * accessing relevant PUB registers */ debug("DDRINFO:ddrphy config start\n"); - ddr_cfg_phy(dram_timing); + + ret = ddr_cfg_phy(dram_timing); + if (ret) + return ret; + debug("DDRINFO: ddrphy config done\n"); /* @@ -165,4 +170,6 @@ void ddr_init(struct dram_timing_info *dram_timing) /* save the dram timing config into memory */ dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); + + return 0; } diff --git a/drivers/ddr/imx/imx8m/ddrphy_train.c b/drivers/ddr/imx/imx8m/ddrphy_train.c index 18f7ed7fea9..306af82504f 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_train.c +++ b/drivers/ddr/imx/imx8m/ddrphy_train.c @@ -8,13 +8,14 @@ #include <asm/arch/ddr.h> #include <asm/arch/lpddr4_define.h> -void ddr_cfg_phy(struct dram_timing_info *dram_timing) +int ddr_cfg_phy(struct dram_timing_info *dram_timing) { struct dram_cfg_param *dram_cfg; struct dram_fsp_msg *fsp_msg; unsigned int num; int i = 0; int j = 0; + int ret; /* initialize PHY configuration */ dram_cfg = dram_timing->ddrphy_cfg; @@ -60,7 +61,9 @@ void ddr_cfg_phy(struct dram_timing_info *dram_timing) dwc_ddrphy_apb_wr(0xd0099, 0x0); /* Wait for the training firmware to complete */ - wait_ddrphy_training_complete(); + ret = wait_ddrphy_training_complete(); + if (ret) + return ret; /* Halt the microcontroller. */ dwc_ddrphy_apb_wr(0xd0099, 0x1); @@ -83,4 +86,6 @@ void ddr_cfg_phy(struct dram_timing_info *dram_timing) /* save the ddr PHY trained CSR in memory for low power use */ ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); + + return 0; } diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c index e60503309eb..863fb438971 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c @@ -84,7 +84,7 @@ static inline void decode_streaming_message(void) debug("\n"); } -void wait_ddrphy_training_complete(void) +int wait_ddrphy_training_complete(void) { unsigned int mail; @@ -95,10 +95,10 @@ void wait_ddrphy_training_complete(void) decode_streaming_message(); } else if (mail == 0x07) { debug("Training PASS\n"); - break; + return 0; } else if (mail == 0xff) { - printf("Training FAILED\n"); - break; + debug("Training FAILED\n"); + return -1; } } } diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index d53d6298bf3..3621636cb28 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -815,6 +815,7 @@ static const struct dm_pci_ops imx_pcie_ops = { static const struct udevice_id imx_pcie_ids[] = { { .compatible = "fsl,imx6q-pcie" }, + { .compatible = "fsl,imx6sx-pcie" }, { } }; diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c index 46d9ec83ce4..997e854ef8f 100644 --- a/drivers/video/lg4573.c +++ b/drivers/video/lg4573.c @@ -5,36 +5,40 @@ * */ #include <common.h> +#include <backlight.h> +#include <display.h> +#include <dm.h> +#include <dm/read.h> +#include <dm/uclass-internal.h> #include <errno.h> #include <spi.h> +#include <asm/gpio.h> #define PWR_ON_DELAY_MSECS 120 -static int lb043wv_spi_write_u16(struct spi_slave *spi, u16 val) +static int lb043wv_spi_write_u16(struct spi_slave *slave, u16 val) { - unsigned long flags = SPI_XFER_BEGIN; unsigned short buf16 = htons(val); int ret = 0; - flags |= SPI_XFER_END; - - ret = spi_xfer(spi, 16, &buf16, NULL, flags); + ret = spi_xfer(slave, 16, &buf16, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); if (ret) debug("%s: Failed to send: %d\n", __func__, ret); return ret; } -static void lb043wv_spi_write_u16_array(struct spi_slave *spi, u16 *buff, +static void lb043wv_spi_write_u16_array(struct spi_slave *slave, u16 *buff, int size) { int i; for (i = 0; i < size; i++) - lb043wv_spi_write_u16(spi, buff[i]); + lb043wv_spi_write_u16(slave, buff[i]); } -static void lb043wv_display_mode_settings(struct spi_slave *spi) +static void lb043wv_display_mode_settings(struct spi_slave *slave) { static u16 display_mode_settings[] = { 0x703A, @@ -72,11 +76,11 @@ static void lb043wv_display_mode_settings(struct spi_slave *spi) }; debug("transfer display mode settings\n"); - lb043wv_spi_write_u16_array(spi, display_mode_settings, + lb043wv_spi_write_u16_array(slave, display_mode_settings, ARRAY_SIZE(display_mode_settings)); } -static void lb043wv_power_settings(struct spi_slave *spi) +static void lb043wv_power_settings(struct spi_slave *slave) { static u16 power_settings[] = { 0x70C0, @@ -103,11 +107,11 @@ static void lb043wv_power_settings(struct spi_slave *spi) }; debug("transfer power settings\n"); - lb043wv_spi_write_u16_array(spi, power_settings, + lb043wv_spi_write_u16_array(slave, power_settings, ARRAY_SIZE(power_settings)); } -static void lb043wv_gamma_settings(struct spi_slave *spi) +static void lb043wv_gamma_settings(struct spi_slave *slave) { static u16 gamma_settings[] = { 0x70D0, @@ -173,54 +177,57 @@ static void lb043wv_gamma_settings(struct spi_slave *spi) }; debug("transfer gamma settings\n"); - lb043wv_spi_write_u16_array(spi, gamma_settings, + lb043wv_spi_write_u16_array(slave, gamma_settings, ARRAY_SIZE(gamma_settings)); } -static void lb043wv_display_on(struct spi_slave *spi) +static void lb043wv_display_on(struct spi_slave *slave) { static u16 sleep_out = 0x7011; static u16 display_on = 0x7029; - lb043wv_spi_write_u16(spi, sleep_out); + lb043wv_spi_write_u16(slave, sleep_out); mdelay(PWR_ON_DELAY_MSECS); - lb043wv_spi_write_u16(spi, display_on); + lb043wv_spi_write_u16(slave, display_on); } -int lg4573_spi_startup(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode) +static int lg4573_spi_startup(struct spi_slave *slave) { - struct spi_slave *spi; int ret; - spi = spi_setup_slave(bus, cs, max_hz, spi_mode); - if (!spi) { - debug("%s: Failed to set up slave\n", __func__); - return -1; - } - - ret = spi_claim_bus(spi); - if (ret) { - debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); - goto err_claim_bus; - } + ret = spi_claim_bus(slave); + if (ret) + return ret; - lb043wv_display_mode_settings(spi); - lb043wv_power_settings(spi); - lb043wv_gamma_settings(spi); + lb043wv_display_mode_settings(slave); + lb043wv_power_settings(slave); + lb043wv_gamma_settings(slave); + lb043wv_display_on(slave); - lb043wv_display_on(spi); + spi_release_bus(slave); return 0; -err_claim_bus: - spi_free_slave(spi); - return -1; } static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - lg4573_spi_startup(CONFIG_LG4573_BUS, CONFIG_LG4573_CS, 10000000, - SPI_MODE_0); + struct spi_slave *slave; + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_DISPLAY, + DM_GET_DRIVER(lg4573_lcd), &dev); + if (ret) { + printf("%s: Could not get lg4573 device\n", __func__); + return ret; + } + slave = dev_get_parent_priv(dev); + if (!slave) { + printf("%s: No slave data\n", __func__); + return -ENODEV; + } + lg4573_spi_startup(slave); + return 0; } @@ -229,3 +236,93 @@ U_BOOT_CMD( "set lgdisplay", "" ); + +static int lg4573_bind(struct udevice *dev) +{ + return 0; +} + +static int lg4573_probe(struct udevice *dev) +{ + return 0; +} + +static const struct udevice_id lg4573_ids[] = { + { .compatible = "lg,lg4573" }, + { } +}; + +struct lg4573_lcd_priv { + struct display_timing timing; + struct udevice *backlight; + struct gpio_desc enable; + int panel_bpp; + u32 power_on_delay; +}; + +static int lg4573_lcd_read_timing(struct udevice *dev, + struct display_timing *timing) +{ + struct lg4573_lcd_priv *priv = dev_get_priv(dev); + + memcpy(timing, &priv->timing, sizeof(struct display_timing)); + + return 0; +} + +static int lg4573_lcd_enable(struct udevice *dev, int bpp, + const struct display_timing *edid) +{ + struct spi_slave *slave = dev_get_parent_priv(dev); + struct lg4573_lcd_priv *priv = dev_get_priv(dev); + int ret = 0; + + dm_gpio_set_value(&priv->enable, 1); + ret = backlight_enable(priv->backlight); + + mdelay(priv->power_on_delay); + lg4573_spi_startup(slave); + + return ret; +}; + +static const struct dm_display_ops lg4573_lcd_ops = { + .read_timing = lg4573_lcd_read_timing, + .enable = lg4573_lcd_enable, +}; + +static int lg4573_ofdata_to_platdata(struct udevice *dev) +{ + struct lg4573_lcd_priv *priv = dev_get_priv(dev); + int ret; + + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { + debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); + return log_ret(ret); + } + ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, + GPIOD_IS_OUT); + if (ret) { + debug("%s: Warning: cannot get enable GPIO: ret=%d\n", + __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); + } + + priv->power_on_delay = dev_read_u32_default(dev, "power-on-delay", 10); + + return 0; +} + +U_BOOT_DRIVER(lg4573_lcd) = { + .name = "lg4573", + .id = UCLASS_DISPLAY, + .ops = &lg4573_lcd_ops, + .ofdata_to_platdata = lg4573_ofdata_to_platdata, + .of_match = lg4573_ids, + .bind = lg4573_bind, + .probe = lg4573_probe, + .priv_auto_alloc_size = sizeof(struct lg4573_lcd_priv), +}; |