diff options
author | Tom Rini | 2018-04-15 08:42:37 -0400 |
---|---|---|
committer | Tom Rini | 2018-04-15 08:42:37 -0400 |
commit | df13a44377b36f438d15de06b07ad4645b89cf4f (patch) | |
tree | c25c837a617fa82826f15237b8f8ff6b81723af0 /drivers | |
parent | 6d0409f256127000a9b32f94d1b52a6ee83382bf (diff) | |
parent | 16879cd25a4089cde2f3393fb09567df53402679 (diff) |
Merge git://git.denx.de/u-boot-net
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/Kconfig | 13 | ||||
-rw-r--r-- | drivers/net/fec_mxc.c | 55 | ||||
-rw-r--r-- | drivers/net/mvneta.c | 10 | ||||
-rw-r--r-- | drivers/net/phy/Kconfig | 8 | ||||
-rw-r--r-- | drivers/net/zynq_gem.c | 9 |
5 files changed, 76 insertions, 19 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 98573cb22a4..3a374d88718 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -155,9 +155,20 @@ config ETHOC help This MAC is present in OpenRISC and Xtensa XTFPGA boards. +config FEC_MXC_SHARE_MDIO + bool "Share the MDIO bus for FEC controller" + depends on FEC_MXC + +config FEC_MXC_MDIO_BASE + hex "MDIO base address for the FEC controller" + depends on FEC_MXC_SHARE_MDIO + help + This specifies the MDIO registers base address. It is used when + two FEC controllers share MDIO bus. + config FEC_MXC bool "FEC Ethernet controller" - depends on MX5 || MX6 + depends on MX5 || MX6 || MX7 help This driver supports the 10/100 Fast Ethernet controller for NXP i.MX processors. diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 29af85ce0a9..0076d6323e4 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -807,7 +807,16 @@ static int fec_recv(struct eth_device *dev) uint16_t bd_status; ulong addr, size, end; int i; + +#ifdef CONFIG_DM_ETH + *packetp = memalign(ARCH_DMA_MINALIGN, FEC_MAX_PKT_SIZE); + if (*packetp == 0) { + printf("%s: error allocating packetp\n", __func__); + return -ENOMEM; + } +#else ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE); +#endif /* Check if any critical events have happened */ ievent = readl(&fec->eth->ievent); @@ -883,8 +892,13 @@ static int fec_recv(struct eth_device *dev) #ifdef CONFIG_FEC_MXC_SWAP_PACKET swap_packet((uint32_t *)addr, frame_length); #endif + +#ifdef CONFIG_DM_ETH + memcpy(*packetp, (char *)addr, frame_length); +#else memcpy(buff, (char *)addr, frame_length); net_process_received_packet(buff, frame_length); +#endif len = frame_length; } else { if (bd_status & FEC_RBD_ERR) @@ -998,18 +1012,9 @@ static void fec_free_descs(struct fec_priv *fec) free(fec->tbd_base); } -#ifdef CONFIG_DM_ETH -struct mii_dev *fec_get_miibus(struct udevice *dev, int dev_id) -#else -struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id) -#endif +struct mii_dev *fec_get_miibus(ulong base_addr, int dev_id) { -#ifdef CONFIG_DM_ETH - struct fec_priv *priv = dev_get_priv(dev); - struct ethernet_regs *eth = priv->eth; -#else - struct ethernet_regs *eth = (struct ethernet_regs *)(ulong)base_addr; -#endif + struct ethernet_regs *eth = (struct ethernet_regs *)base_addr; struct mii_dev *bus; int ret; @@ -1141,12 +1146,12 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr) #endif int ret; -#ifdef CONFIG_MX28 +#ifdef CONFIG_FEC_MXC_MDIO_BASE /* * The i.MX28 has two ethernet interfaces, but they are not equal. * Only the first one can access the MDIO bus. */ - base_mii = MXS_ENET0_BASE; + base_mii = CONFIG_FEC_MXC_MDIO_BASE; #else base_mii = addr; #endif @@ -1202,10 +1207,19 @@ static int fecmxc_read_rom_hwaddr(struct udevice *dev) return fec_get_hwaddr(priv->dev_id, pdata->enetaddr); } +static int fecmxc_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + if (packet) + free(packet); + + return 0; +} + static const struct eth_ops fecmxc_ops = { .start = fecmxc_init, .send = fecmxc_send, .recv = fecmxc_recv, + .free_pkt = fecmxc_free_pkt, .stop = fecmxc_halt, .write_hwaddr = fecmxc_set_hwaddr, .read_rom_hwaddr = fecmxc_read_rom_hwaddr, @@ -1237,7 +1251,6 @@ static int fecmxc_probe(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); struct fec_priv *priv = dev_get_priv(dev); struct mii_dev *bus = NULL; - int dev_id = -1; uint32_t start; int ret; @@ -1258,9 +1271,13 @@ static int fecmxc_probe(struct udevice *dev) } fec_reg_setup(priv); - priv->dev_id = (dev_id == -1) ? 0 : dev_id; - bus = fec_get_miibus(dev, dev_id); + priv->dev_id = dev->seq; +#ifdef CONFIG_FEC_MXC_MDIO_BASE + bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq); +#else + bus = fec_get_miibus((ulong)priv->eth, dev->seq); +#endif if (!bus) { ret = -ENOMEM; goto err_mii; @@ -1275,12 +1292,11 @@ static int fecmxc_probe(struct udevice *dev) return 0; -err_timeout: - free(priv->phydev); err_phy: mdio_unregister(bus); free(bus); err_mii: +err_timeout: fec_free_descs(priv); return ret; } @@ -1326,6 +1342,9 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev) static const struct udevice_id fecmxc_ids[] = { { .compatible = "fsl,imx6q-fec" }, + { .compatible = "fsl,imx6sl-fec" }, + { .compatible = "fsl,imx6sx-fec" }, + { .compatible = "fsl,imx6ul-fec" }, { } }; diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 83e31537688..f2e9acfd1f3 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -890,6 +890,15 @@ static void mvneta_mac_addr_set(struct mvneta_port *pp, unsigned char *addr, mvneta_set_ucast_addr(pp, addr[5], queue); } +static int mvneta_write_hwaddr(struct udevice *dev) +{ + mvneta_mac_addr_set(dev_get_priv(dev), + ((struct eth_pdata *)dev_get_platdata(dev))->enetaddr, + rxq_def); + + return 0; +} + /* Handle rx descriptor fill by setting buf_cookie and buf_phys_addr */ static void mvneta_rx_desc_fill(struct mvneta_rx_desc *rx_desc, u32 phys_addr, u32 cookie) @@ -1753,6 +1762,7 @@ static const struct eth_ops mvneta_ops = { .send = mvneta_send, .recv = mvneta_recv, .stop = mvneta_stop, + .write_hwaddr = mvneta_write_hwaddr, }; static int mvneta_ofdata_to_platdata(struct udevice *dev) diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 179e0418bca..f5821dfed96 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -13,12 +13,20 @@ menuconfig PHYLIB if PHYLIB +config PHY_ADDR_ENABLE + bool "Limit phy address" + default y if ARCH_SUNXI + help + Select this if you want to control which phy address is used + +if PHY_ADDR_ENABLE config PHY_ADDR int "PHY address" default 1 if ARCH_SUNXI default 0 help The address of PHY on MII bus. Usually in range of 0 to 31. +endif config B53_SWITCH bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support." diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 1390c36c614..dd36a8c22aa 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -182,6 +182,7 @@ struct zynq_gem_priv { int phy_of_handle; struct mii_dev *bus; struct clk clk; + u32 max_speed; bool int_pcs; }; @@ -341,6 +342,12 @@ static int zynq_phy_init(struct udevice *dev) priv->phydev->supported &= supported | ADVERTISED_Pause | ADVERTISED_Asym_Pause; + if (priv->max_speed) { + ret = phy_set_supported(priv->phydev, priv->max_speed); + if (ret) + return ret; + } + priv->phydev->advertising = priv->phydev->supported; if (priv->phy_of_handle > 0) @@ -704,6 +711,8 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) } priv->interface = pdata->phy_interface; + priv->max_speed = fdtdec_get_uint(gd->fdt_blob, priv->phy_of_handle, + "max-speed", SPEED_1000); priv->int_pcs = fdtdec_get_bool(gd->fdt_blob, node, "is-internal-pcspma"); |