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authorVignesh Raghavendra2019-12-09 10:25:39 +0530
committerLokesh Vutla2020-01-20 10:10:28 +0530
commitf03cb5c9e5b9aca3248366b1593098651c564ed1 (patch)
tree30e7b9d532b815bec5fc93b07b757440a950c5e2 /drivers
parentb0ab00839f3ffff9bd3573c204938004d84d05a5 (diff)
dma: ti: k3-udma: Fix build warnings when building for 32 bit platforms
Cast pointers properly so as to avoid warnings when driver is built for 32 bit platforms Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/ti/k3-udma.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index a375854dcd3..95f6b5a93a3 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -1476,8 +1476,8 @@ static int *udma_prep_dma_memcpy(struct udma_chan *uc, dma_addr_t dest,
cppi5_tr_csf_set(&tr_req[num_tr - 1].flags, CPPI5_TR_CSF_EOP);
- flush_dcache_range((u64)tr_desc,
- ALIGN((u64)tr_desc + desc_size,
+ flush_dcache_range((unsigned long)tr_desc,
+ ALIGN((unsigned long)tr_desc + desc_size,
ARCH_DMA_MINALIGN));
udma_push_to_ring(uc->tchan->t_ring, tr_desc);
@@ -1648,11 +1648,11 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
cppi5_hdesc_set_pkttype(desc_tx, packet_data.pkt_type);
cppi5_desc_set_tags_ids(&desc_tx->hdr, 0, packet_data.dest_tag);
- flush_dcache_range((u64)dma_src,
- ALIGN((u64)dma_src + len,
+ flush_dcache_range((unsigned long)dma_src,
+ ALIGN((unsigned long)dma_src + len,
ARCH_DMA_MINALIGN));
- flush_dcache_range((u64)desc_tx,
- ALIGN((u64)desc_tx + uc->hdesc_size,
+ flush_dcache_range((unsigned long)desc_tx,
+ ALIGN((unsigned long)desc_tx + uc->hdesc_size,
ARCH_DMA_MINALIGN));
ret = udma_push_to_ring(uc->tchan->t_ring, uc->desc_tx);
@@ -1810,8 +1810,8 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
cppi5_hdesc_set_pktlen(desc_rx, size);
cppi5_hdesc_attach_buf(desc_rx, dma_dst, size, dma_dst, size);
- flush_dcache_range((u64)desc_rx,
- ALIGN((u64)desc_rx + uc->hdesc_size,
+ flush_dcache_range((unsigned long)desc_rx,
+ ALIGN((unsigned long)desc_rx + uc->hdesc_size,
ARCH_DMA_MINALIGN));
udma_push_to_ring(uc->rchan->fd_ring, desc_rx);