diff options
| author | Haibo Chen | 2020-09-01 15:34:06 +0800 |
|---|---|---|
| committer | Stefano Babic | 2020-09-17 14:41:07 +0200 |
| commit | f9c3a816c0de61565a0afd1608de20ecb54e9243 (patch) | |
| tree | d04a0e9cbee54c27e42e8dca25909bfff65764be /drivers | |
| parent | d1a7205532a34bad2b83451258ca4ccacb9085e4 (diff) | |
mmc: fsl_esdhc_imx: check the clock stable status after config the clock rate.
Currently, after config the clock rate, delay 10ms, this is quite a rough
method. Check the clock stable status in the present status register is
enough.
Tested-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/fsl_esdhc_imx.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 788677984bf..0c866b168f9 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -36,6 +36,7 @@ #include <dt-structs.h> #include <mapmem.h> #include <dm/ofnode.h> +#include <linux/iopoll.h> #if !CONFIG_IS_ENABLED(BLK) #include "mmc_private.h" @@ -631,6 +632,8 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; + u32 tmp; + int ret; #ifdef ARCH_MXC #ifdef CONFIG_MX53 /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ @@ -664,7 +667,9 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk); - udelay(10000); + ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDSTB, 100); + if (ret) + pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n"); #ifdef CONFIG_FSL_USDHC esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); |