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authorTom Rini2024-04-01 09:08:13 -0400
committerTom Rini2024-04-01 09:08:13 -0400
commitbc39e06778168a34bb4e0a34fbee4edbde4414d8 (patch)
tree1a62e02df7db59fcffe3c57c24cf577039a4d389 /dts/upstream/Bindings/dma
parent27795dd717dadc73091e1b4d6c50952b93aaa819 (diff)
parent93743d241c64bc1f7ecbf3262d1683176551e11f (diff)
Subtree merge tag 'v6.8-dts' of devicetree-rebasing repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
Diffstat (limited to 'dts/upstream/Bindings/dma')
-rw-r--r--dts/upstream/Bindings/dma/dma-controller.yaml15
-rw-r--r--dts/upstream/Bindings/dma/dma-router.yaml11
-rw-r--r--dts/upstream/Bindings/dma/loongson,ls2x-apbdma.yaml62
-rw-r--r--dts/upstream/Bindings/dma/nvidia,tegra210-adma.yaml3
-rw-r--r--dts/upstream/Bindings/dma/qcom,gpi.yaml2
-rw-r--r--dts/upstream/Bindings/dma/renesas,rz-dmac.yaml2
-rw-r--r--dts/upstream/Bindings/dma/sifive,fu540-c000-pdma.yaml1
-rw-r--r--dts/upstream/Bindings/dma/ti/k3-bcdma.yaml39
-rw-r--r--dts/upstream/Bindings/dma/ti/k3-pktdma.yaml26
-rw-r--r--dts/upstream/Bindings/dma/ti/k3-udma.yaml20
10 files changed, 142 insertions, 39 deletions
diff --git a/dts/upstream/Bindings/dma/dma-controller.yaml b/dts/upstream/Bindings/dma/dma-controller.yaml
index 04d150d4d15..e6afca558c2 100644
--- a/dts/upstream/Bindings/dma/dma-controller.yaml
+++ b/dts/upstream/Bindings/dma/dma-controller.yaml
@@ -19,19 +19,4 @@ properties:
additionalProperties: true
-examples:
- - |
- dma: dma-controller@48000000 {
- compatible = "ti,omap-sdma";
- reg = <0x48000000 0x1000>;
- interrupts = <0 12 0x4>,
- <0 13 0x4>,
- <0 14 0x4>,
- <0 15 0x4>;
- #dma-cells = <1>;
- dma-channels = <32>;
- dma-requests = <127>;
- dma-channel-mask = <0xfffe>;
- };
-
...
diff --git a/dts/upstream/Bindings/dma/dma-router.yaml b/dts/upstream/Bindings/dma/dma-router.yaml
index 346fe0fa446..5ad2febc581 100644
--- a/dts/upstream/Bindings/dma/dma-router.yaml
+++ b/dts/upstream/Bindings/dma/dma-router.yaml
@@ -40,15 +40,4 @@ required:
additionalProperties: true
-examples:
- - |
- sdma_xbar: dma-router@4a002b78 {
- compatible = "ti,dra7-dma-crossbar";
- reg = <0x4a002b78 0xfc>;
- #dma-cells = <1>;
- dma-requests = <205>;
- ti,dma-safe-map = <0>;
- dma-masters = <&sdma>;
- };
-
...
diff --git a/dts/upstream/Bindings/dma/loongson,ls2x-apbdma.yaml b/dts/upstream/Bindings/dma/loongson,ls2x-apbdma.yaml
new file mode 100644
index 00000000000..6a1b49a49a6
--- /dev/null
+++ b/dts/upstream/Bindings/dma/loongson,ls2x-apbdma.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson LS2X APB DMA controller
+
+description:
+ The Loongson LS2X APB DMA controller is used for transferring data
+ between system memory and the peripherals on the APB bus.
+
+maintainers:
+ - Binbin Zhou <zhoubinbin@loongson.cn>
+
+allOf:
+ - $ref: dma-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: loongson,ls2k1000-apbdma
+ - items:
+ - const: loongson,ls2k0500-apbdma
+ - const: loongson,ls2k1000-apbdma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ '#dma-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - '#dma-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/clock/loongson,ls2k-clk.h>
+
+ dma-controller@1fe00c00 {
+ compatible = "loongson,ls2k1000-apbdma";
+ reg = <0x1fe00c00 0x8>;
+ interrupt-parent = <&liointc1>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk LOONGSON2_APB_CLK>;
+ #dma-cells = <1>;
+ };
+
+...
diff --git a/dts/upstream/Bindings/dma/nvidia,tegra210-adma.yaml b/dts/upstream/Bindings/dma/nvidia,tegra210-adma.yaml
index 4003dbe9494..877147e95ec 100644
--- a/dts/upstream/Bindings/dma/nvidia,tegra210-adma.yaml
+++ b/dts/upstream/Bindings/dma/nvidia,tegra210-adma.yaml
@@ -53,6 +53,9 @@ properties:
ADMA_CHn_CTRL register.
const: 1
+ dma-channel-mask:
+ maxItems: 1
+
required:
- compatible
- reg
diff --git a/dts/upstream/Bindings/dma/qcom,gpi.yaml b/dts/upstream/Bindings/dma/qcom,gpi.yaml
index 88d0de3d1b4..deb64cb9ca3 100644
--- a/dts/upstream/Bindings/dma/qcom,gpi.yaml
+++ b/dts/upstream/Bindings/dma/qcom,gpi.yaml
@@ -32,6 +32,8 @@ properties:
- qcom,sm8350-gpi-dma
- qcom,sm8450-gpi-dma
- qcom,sm8550-gpi-dma
+ - qcom,sm8650-gpi-dma
+ - qcom,x1e80100-gpi-dma
- const: qcom,sm6350-gpi-dma
- items:
- enum:
diff --git a/dts/upstream/Bindings/dma/renesas,rz-dmac.yaml b/dts/upstream/Bindings/dma/renesas,rz-dmac.yaml
index c284abc6784..a42b6a26a6d 100644
--- a/dts/upstream/Bindings/dma/renesas,rz-dmac.yaml
+++ b/dts/upstream/Bindings/dma/renesas,rz-dmac.yaml
@@ -16,7 +16,7 @@ properties:
compatible:
items:
- enum:
- - renesas,r9a07g043-dmac # RZ/G2UL
+ - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
- renesas,r9a07g044-dmac # RZ/G2{L,LC}
- renesas,r9a07g054-dmac # RZ/V2L
- const: renesas,rz-dmac
diff --git a/dts/upstream/Bindings/dma/sifive,fu540-c000-pdma.yaml b/dts/upstream/Bindings/dma/sifive,fu540-c000-pdma.yaml
index a1af0b90636..3b22183a1a3 100644
--- a/dts/upstream/Bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/dts/upstream/Bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -29,6 +29,7 @@ properties:
compatible:
items:
- enum:
+ - microchip,mpfs-pdma
- sifive,fu540-c000-pdma
- const: sifive,pdma0
description:
diff --git a/dts/upstream/Bindings/dma/ti/k3-bcdma.yaml b/dts/upstream/Bindings/dma/ti/k3-bcdma.yaml
index 4ca300a42a9..27b8e163656 100644
--- a/dts/upstream/Bindings/dma/ti/k3-bcdma.yaml
+++ b/dts/upstream/Bindings/dma/ti/k3-bcdma.yaml
@@ -37,11 +37,11 @@ properties:
reg:
minItems: 3
- maxItems: 5
+ maxItems: 9
reg-names:
minItems: 3
- maxItems: 5
+ maxItems: 9
"#dma-cells":
const: 3
@@ -141,7 +141,10 @@ allOf:
ti,sci-rm-range-tchan: false
reg:
- maxItems: 3
+ items:
+ - description: BCDMA Control /Status Registers region
+ - description: RX Channel Realtime Registers region
+ - description: Ring Realtime Registers region
reg-names:
items:
@@ -161,14 +164,29 @@ allOf:
properties:
reg:
minItems: 5
+ items:
+ - description: BCDMA Control /Status Registers region
+ - description: Block Copy Channel Realtime Registers region
+ - description: RX Channel Realtime Registers region
+ - description: TX Channel Realtime Registers region
+ - description: Ring Realtime Registers region
+ - description: Ring Configuration Registers region
+ - description: TX Channel Configuration Registers region
+ - description: RX Channel Configuration Registers region
+ - description: Block Copy Channel Configuration Registers region
reg-names:
+ minItems: 5
items:
- const: gcfg
- const: bchanrt
- const: rchanrt
- const: tchanrt
- const: ringrt
+ - const: ring
+ - const: tchan
+ - const: rchan
+ - const: bchan
required:
- ti,sci-rm-range-bchan
@@ -184,7 +202,11 @@ allOf:
ti,sci-rm-range-bchan: false
reg:
- maxItems: 4
+ items:
+ - description: BCDMA Control /Status Registers region
+ - description: RX Channel Realtime Registers region
+ - description: TX Channel Realtime Registers region
+ - description: Ring Realtime Registers region
reg-names:
items:
@@ -220,8 +242,13 @@ examples:
<0x0 0x4c000000 0x0 0x20000>,
<0x0 0x4a820000 0x0 0x20000>,
<0x0 0x4aa40000 0x0 0x20000>,
- <0x0 0x4bc00000 0x0 0x100000>;
- reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
+ <0x0 0x4bc00000 0x0 0x100000>,
+ <0x0 0x48600000 0x0 0x8000>,
+ <0x0 0x484a4000 0x0 0x2000>,
+ <0x0 0x484c2000 0x0 0x2000>,
+ <0x0 0x48420000 0x0 0x2000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
+ "ring", "tchan", "rchan", "bchan";
msi-parent = <&inta_main_dmss>;
#dma-cells = <3>;
diff --git a/dts/upstream/Bindings/dma/ti/k3-pktdma.yaml b/dts/upstream/Bindings/dma/ti/k3-pktdma.yaml
index a69f62f854d..11e064c0299 100644
--- a/dts/upstream/Bindings/dma/ti/k3-pktdma.yaml
+++ b/dts/upstream/Bindings/dma/ti/k3-pktdma.yaml
@@ -45,14 +45,28 @@ properties:
The second cell is the ASEL value for the channel
reg:
- maxItems: 4
+ minItems: 4
+ items:
+ - description: Packet DMA Control /Status Registers region
+ - description: RX Channel Realtime Registers region
+ - description: TX Channel Realtime Registers region
+ - description: Ring Realtime Registers region
+ - description: Ring Configuration Registers region
+ - description: TX Configuration Registers region
+ - description: RX Configuration Registers region
+ - description: RX Flow Configuration Registers region
reg-names:
+ minItems: 4
items:
- const: gcfg
- const: rchanrt
- const: tchanrt
- const: ringrt
+ - const: ring
+ - const: tchan
+ - const: rchan
+ - const: rflow
msi-parent: true
@@ -136,8 +150,14 @@ examples:
reg = <0x0 0x485c0000 0x0 0x100>,
<0x0 0x4a800000 0x0 0x20000>,
<0x0 0x4aa00000 0x0 0x40000>,
- <0x0 0x4b800000 0x0 0x400000>;
- reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ <0x0 0x4b800000 0x0 0x400000>,
+ <0x0 0x485e0000 0x0 0x20000>,
+ <0x0 0x484a0000 0x0 0x4000>,
+ <0x0 0x484c0000 0x0 0x2000>,
+ <0x0 0x48430000 0x0 0x4000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
+ "ring", "tchan", "rchan", "rflow";
+
msi-parent = <&inta_main_dmss>;
#dma-cells = <2>;
diff --git a/dts/upstream/Bindings/dma/ti/k3-udma.yaml b/dts/upstream/Bindings/dma/ti/k3-udma.yaml
index 22f6c5e2f7f..b18cf2bfdb5 100644
--- a/dts/upstream/Bindings/dma/ti/k3-udma.yaml
+++ b/dts/upstream/Bindings/dma/ti/k3-udma.yaml
@@ -69,13 +69,24 @@ properties:
- ti,j721e-navss-mcu-udmap
reg:
- maxItems: 3
+ minItems: 3
+ items:
+ - description: UDMA-P Control /Status Registers region
+ - description: RX Channel Realtime Registers region
+ - description: TX Channel Realtime Registers region
+ - description: TX Configuration Registers region
+ - description: RX Configuration Registers region
+ - description: RX Flow Configuration Registers region
reg-names:
+ minItems: 3
items:
- const: gcfg
- const: rchanrt
- const: tchanrt
+ - const: tchan
+ - const: rchan
+ - const: rflow
msi-parent: true
@@ -158,8 +169,11 @@ examples:
compatible = "ti,am654-navss-main-udmap";
reg = <0x0 0x31150000 0x0 0x100>,
<0x0 0x34000000 0x0 0x100000>,
- <0x0 0x35000000 0x0 0x100000>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
+ <0x0 0x35000000 0x0 0x100000>,
+ <0x0 0x30b00000 0x0 0x20000>,
+ <0x0 0x30c00000 0x0 0x8000>,
+ <0x0 0x30d00000 0x0 0x4000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "tchan", "rchan", "rflow";
#dma-cells = <1>;
ti,ringacc = <&ringacc>;