diff options
author | Tom Rini | 2024-07-20 11:15:22 -0600 |
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committer | Tom Rini | 2024-07-20 11:15:22 -0600 |
commit | 5024a96db8ea6ff2e814f4599af9e5faf09296b7 (patch) | |
tree | bc0d02e7022f796932c5d24c9d6b61b166488efa /dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | |
parent | d353e30ef3610c01b031dc9ada53701b13d473d4 (diff) | |
parent | 762f85bb2e36762ee4d7395002b8181905aec690 (diff) |
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
Diffstat (limited to 'dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml')
-rw-r--r-- | dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index ba966a78a12..16634f73bdc 100644 --- a/dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/dts/upstream/Bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -88,11 +88,11 @@ properties: - description: offset of PCIe 4-lane configuration register - description: offset of configuration bit for this PHY - "#clock-cells": - const: 0 + "#clock-cells": true clock-output-names: - maxItems: 1 + minItems: 1 + maxItems: 2 "#phy-cells": const: 0 @@ -198,7 +198,6 @@ allOf: enum: - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy - - qcom,x1e80100-qmp-gen3x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy then: properties: @@ -213,6 +212,27 @@ allOf: reset-names: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8450-qmp-gen4x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy + - qcom,sm8650-qmp-gen4x2-pcie-phy + then: + properties: + clock-output-names: + minItems: 2 + "#clock-cells": + const: 1 + else: + properties: + clock-output-names: + maxItems: 1 + "#clock-cells": + const: 0 + examples: - | #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> |