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authorTom Rini2024-02-29 12:33:36 -0500
committerTom Rini2024-02-29 12:33:36 -0500
commitdbe9334e5125efcf8a825e7c5c924e2780e609e3 (patch)
tree76d7c01587afe238d2127a7562ca256fe9c87a9f /dts/upstream/Bindings/rng/apm,x-gene-rng.yaml
parentea3348ebc215d2a9d6dd14f40fb7e8c86dc45e4a (diff)
parent53633a893a06bd5a0c807287d9cc29337806eaf7 (diff)
Merge commit '53633a893a06bd5a0c807287d9cc29337806eaf7' as 'dts/upstream'
Diffstat (limited to 'dts/upstream/Bindings/rng/apm,x-gene-rng.yaml')
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diff --git a/dts/upstream/Bindings/rng/apm,x-gene-rng.yaml b/dts/upstream/Bindings/rng/apm,x-gene-rng.yaml
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/apm,x-gene-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: APM X-Gene SoC Random Number Generator
+
+maintainers:
+ - Khuong Dinh <khuong@os.amperecomputing.com>
+
+properties:
+ compatible:
+ const: apm,xgene-rng
+
+ clocks:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - interrupts
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ rng@10520000 {
+ compatible = "apm,xgene-rng";
+ reg = <0x0 0x10520000 0x0 0x100>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rngpkaclk 0>;
+ };
+ };