diff options
| author | Tom Rini | 2024-07-20 11:15:22 -0600 |
|---|---|---|
| committer | Tom Rini | 2024-07-20 11:15:22 -0600 |
| commit | 5024a96db8ea6ff2e814f4599af9e5faf09296b7 (patch) | |
| tree | bc0d02e7022f796932c5d24c9d6b61b166488efa /dts/upstream/src/arm64/freescale/imx8mp-evk.dts | |
| parent | d353e30ef3610c01b031dc9ada53701b13d473d4 (diff) | |
| parent | 762f85bb2e36762ee4d7395002b8181905aec690 (diff) | |
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
Diffstat (limited to 'dts/upstream/src/arm64/freescale/imx8mp-evk.dts')
| -rw-r--r-- | dts/upstream/src/arm64/freescale/imx8mp-evk.dts | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/freescale/imx8mp-evk.dts b/dts/upstream/src/arm64/freescale/imx8mp-evk.dts index 9beba8d6a0d..8be5b2a57f2 100644 --- a/dts/upstream/src/arm64/freescale/imx8mp-evk.dts +++ b/dts/upstream/src/arm64/freescale/imx8mp-evk.dts @@ -145,6 +145,27 @@ }; + sound-hdmi { + compatible = "fsl,imx-audio-hdmi"; + model = "audio-hdmi"; + audio-cpu = <&aud2htx>; + hdmi-out; + }; + + sound-micfil { + compatible = "fsl,imx-audio-card"; + model = "micfil-audio"; + + pri-dai-link { + link-name = "micfil hifi"; + format = "i2s"; + + cpu { + sound-dai = <&micfil>; + }; + }; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -198,6 +219,10 @@ cpu-supply = <®_arm>; }; +&aud2htx { + status = "okay"; +}; + &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; @@ -524,6 +549,16 @@ status = "okay"; }; +&micfil { + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pdm>; + assigned-clocks = <&clk IMX8MP_CLK_PDM>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates = <196608000>; + status = "okay"; +}; + &mipi_dsi { samsung,esc-clock-frequency = <10000000>; status = "okay"; @@ -790,6 +825,16 @@ >; }; + pinctrl_pdm: pdmgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6 + MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6 + MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_PDM_BIT_STREAM01 0xd6 + MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_PDM_BIT_STREAM02 0xd6 + MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_PDM_BIT_STREAM03 0xd6 + >; + }; + pinctrl_pmic: pmicgrp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x000001c0 |