aboutsummaryrefslogtreecommitdiff
path: root/dts/upstream/src/arm64/hisilicon/hip05.dtsi
diff options
context:
space:
mode:
authorTom Rini2024-07-20 11:15:22 -0600
committerTom Rini2024-07-20 11:15:22 -0600
commit5024a96db8ea6ff2e814f4599af9e5faf09296b7 (patch)
treebc0d02e7022f796932c5d24c9d6b61b166488efa /dts/upstream/src/arm64/hisilicon/hip05.dtsi
parentd353e30ef3610c01b031dc9ada53701b13d473d4 (diff)
parent762f85bb2e36762ee4d7395002b8181905aec690 (diff)
Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstreamHEADmaster
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
Diffstat (limited to 'dts/upstream/src/arm64/hisilicon/hip05.dtsi')
-rw-r--r--dts/upstream/src/arm64/hisilicon/hip05.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/dts/upstream/src/arm64/hisilicon/hip05.dtsi b/dts/upstream/src/arm64/hisilicon/hip05.dtsi
index 65ddc0698f8..d0912ca5f23 100644
--- a/dts/upstream/src/arm64/hisilicon/hip05.dtsi
+++ b/dts/upstream/src/arm64/hisilicon/hip05.dtsi
@@ -279,6 +279,12 @@
};
};
+ refclk200mhz: refclk200mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
@@ -298,12 +304,6 @@
#size-cells = <2>;
ranges;
- refclk200mhz: refclk200mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
uart0: serial@80300000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x80300000 0x0 0x10000>;