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authorTom Rini2024-07-20 11:15:22 -0600
committerTom Rini2024-07-20 11:15:22 -0600
commit5024a96db8ea6ff2e814f4599af9e5faf09296b7 (patch)
treebc0d02e7022f796932c5d24c9d6b61b166488efa /dts/upstream/src/arm64/qcom/ipq8074.dtsi
parentd353e30ef3610c01b031dc9ada53701b13d473d4 (diff)
parent762f85bb2e36762ee4d7395002b8181905aec690 (diff)
Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstreamHEADmaster
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
Diffstat (limited to 'dts/upstream/src/arm64/qcom/ipq8074.dtsi')
-rw-r--r--dts/upstream/src/arm64/qcom/ipq8074.dtsi41
1 files changed, 40 insertions, 1 deletions
diff --git a/dts/upstream/src/arm64/qcom/ipq8074.dtsi b/dts/upstream/src/arm64/qcom/ipq8074.dtsi
index e5b89753aa5..5d42de829e7 100644
--- a/dts/upstream/src/arm64/qcom/ipq8074.dtsi
+++ b/dts/upstream/src/arm64/qcom/ipq8074.dtsi
@@ -323,6 +323,13 @@
bias-disable;
};
+ serial_5_pins: serial5-state {
+ pins = "gpio9", "gpio16";
+ function = "blsp5_uart";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
i2c_0_pins: i2c-0-state {
pins = "gpio42", "gpio43";
function = "blsp1_i2c";
@@ -349,7 +356,7 @@
"gpio5", "gpio6", "gpio7",
"gpio8", "gpio10", "gpio11",
"gpio12", "gpio13", "gpio14",
- "gpio15", "gpio16", "gpio17";
+ "gpio15", "gpio17";
function = "qpic";
drive-strength = <8>;
bias-disable;
@@ -471,6 +478,18 @@
status = "disabled";
};
+ blsp1_uart6: serial@78b4000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x078b4000 0x200>;
+ interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ pinctrl-0 = <&serial_5_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
blsp1_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
@@ -864,6 +883,16 @@
"ahb",
"axi_m_sticky";
status = "disabled";
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0: pcie@20000000 {
@@ -929,6 +958,16 @@
"axi_m_sticky",
"axi_s_sticky";
status = "disabled";
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
};