diff options
| author | Haiying Wang | 2006-12-07 10:35:55 -0600 |
|---|---|---|
| committer | Jon Loeliger | 2007-03-22 11:02:35 -0500 |
| commit | 9964a4dd0d4ef5a037febaebf1aa494b1a72991c (patch) | |
| tree | 6e6a747a08077fec337d977ce0f9b65fd1af89f8 /include/asm-ppc | |
| parent | 5a58a73ceb0a4059c42ef64cedbc1a45e0aaa00e (diff) | |
Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/immap_86xx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index a5552c48ee9..0e3fc3403d5 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -721,6 +721,8 @@ typedef struct ccsr_pic { uint frr; /* 0x41000 - Feature Reporting Register */ char res10[28]; uint gcr; /* 0x41020 - Global Configuration Register */ +#define MPC86xx_PICGCR_RST 0x80000000 +#define MPC86xx_PICGCR_MODE 0x20000000 char res11[92]; uint vir; /* 0x41080 - Vendor Identification Register */ char res12[12]; |