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authorwdenk2004-06-06 21:35:06 +0000
committerwdenk2004-06-06 21:35:06 +0000
commit1114257c9df3fa3db39ff55dd03d1f7cbc5c0603 (patch)
tree7d62ed142cf3c00aea35e518ed28dc9f5c6887fd /include/configs/MPC86xADS.h
parentd7a04603ae9c85d496b3991f29dbb8ea339ace49 (diff)
Patch by Yuli Barcohen, 19 Apr 2004:
- Rename DUET_ADS to MPC885ADS - Rename CONFIG_DUET to CONFIG_MPC885_FAMILY - Rename CONFIG_866_et_al to CONFIG_MPC866_FAMILY - Clean up FADS family port to use the new defines
Diffstat (limited to 'include/configs/MPC86xADS.h')
-rw-r--r--include/configs/MPC86xADS.h13
1 files changed, 4 insertions, 9 deletions
diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h
index a6e26067142..565f9bb5c03 100644
--- a/include/configs/MPC86xADS.h
+++ b/include/configs/MPC86xADS.h
@@ -33,19 +33,14 @@
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 38400
-# define CFG_8XX_FACT 5 /* Multiply by 5 */
-# define CFG_8XX_XIN 10000000 /* 10 MHz in */
+#define CONFIG_8xx_OSCLK 10000000 /* 10MHz oscillator on EXTCLK */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ 1
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register 14-22
- *-----------------------------------------------------------------------
- * set the PLL, the low-power modes and the reset control
- */
-#define CFG_PLPRCR ((CFG_8XX_FACT << PLPRCR_MFI_SHIFT) | PLPRCR_TEXPS)
-
#include "fads.h"
+#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
+#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)
+
#endif /* __CONFIG_H */