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authorYork Sun2016-12-28 08:43:45 -0800
committerTom Rini2017-01-04 19:40:52 -0500
commit51370d561842ae7438337e77a93177e13796ac45 (patch)
treeda97bb17019e198360bd99d81e9d98a533c014b4 /include/configs/P2041RDB.h
parent66e399b68d20d96a90ba391d75c2290bd63bf4a5 (diff)
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/P2041RDB.h')
-rw-r--r--include/configs/P2041RDB.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 9c389d4739c..3cd5c3c6130 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -40,7 +40,7 @@
#endif
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */