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authorSimon Glass2021-08-01 18:54:24 -0600
committerTom Rini2021-08-05 16:14:36 -0400
commit5ccee855f2106eba5a28d9a30f47d94f9ecc17eb (patch)
tree966683b8b5d657616ff7d77028afd33f66c48b5e /include/configs/corenet_ds.h
parentdebf660312a60ff35afb62961e3352a0b22abc0a (diff)
ppc: Drop DM_PCI from config files
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/corenet_ds.h')
-rw-r--r--include/configs/corenet_ds.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 924093e6b05..c877f3c725e 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -430,27 +430,6 @@
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
-#endif
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */