diff options
author | Tom Rini | 2022-11-16 13:10:41 -0500 |
---|---|---|
committer | Tom Rini | 2022-12-05 16:06:08 -0500 |
commit | 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 (patch) | |
tree | e1b9902c5257875fc5fe8243e1e759594f90beed /include/configs/socfpga_common.h | |
parent | a322afc9f9b69dd52a9bc72937cd5adc18ea55c7 (diff) |
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/socfpga_common.h')
-rw-r--r-- | include/configs/socfpga_common.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 7ef7c5da828..bbbdea6664c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -12,12 +12,12 @@ */ #define PHYS_SDRAM_1 0x0 #if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 +#define CFG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 +#define CFG_SYS_INIT_RAM_ADDR 0xFFE00000 /* SPL memory allocation configuration, this is for FAT implementation */ -#define CONFIG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \ +#define CFG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE) #endif @@ -27,9 +27,9 @@ * at this address to not overwrite the bootcounter by checking, if the * bootcounter address is located in the internal SRAM. */ -#if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ - (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE))) +#if ((CONFIG_SYS_BOOTCOUNT_ADDR > CFG_SYS_INIT_RAM_ADDR) && \ + (CONFIG_SYS_BOOTCOUNT_ADDR < (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE))) #endif /* @@ -48,16 +48,16 @@ /* * Cache */ -#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS +#define CFG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* * L4 OSC1 Timer 0 */ #ifndef CONFIG_TIMER -#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) -#ifndef CONFIG_SYS_TIMER_RATE -#define CONFIG_SYS_TIMER_RATE 25000000 +#define CFG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS +#define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMERBASE + 0x4) +#ifndef CFG_SYS_TIMER_RATE +#define CFG_SYS_TIMER_RATE 25000000 #endif #endif |